AGV / agv_shengyiPPxiaoche · Files

; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637]
; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave -o.\flash\obj\wizchip_conf.o --asm_dir=.\Flash\List\ --list_dir=.\Flash\List\ --depend=.\flash\obj\wizchip_conf.d --cpu=Cortex-M4.fp --apcs=interwork -O1 --diag_suppress=9931,870 -I..\..\Libraries\CMSIS\Include -I..\..\Libraries\CMSIS\Device\ST\STM32F4xx\Include -I..\..\Libraries\STM32F4xx_StdPeriph_Driver\inc -I..\..\uCOS-III\uC-CPU -I..\..\uCOS-III\uC-LIB -I..\..\uCOS-III\uCOS-III\Ports -I..\..\uCOS-III\uCOS-III\Source -I..\..\uCOS-III\uC-CPU\ARM-Cortex-M4\RealView -I..\..\uCOS-III\uC-LIB\Ports\ARM-Cortex-M4\RealView -I..\..\uCOS-III\uCOS-III\Ports\ARM-Cortex-M4\Generic\RealView -I..\..\User -I..\..\User\bsp -I..\..\User\bsp\inc -I..\..\User\libapp -I..\..\RL-ARM\Config -I..\..\RL-ARM\Driver -I..\..\RL-ARM\RL-RTX\inc -I..\..\User\bsp\BSP -I..\..\RL-ARM\RL-CAN -I..\..\Libraries\DSP_LIB\Include -I..\..\MODBUS\modbus\rtu -I..\..\MODBUS\BARE\port -I..\..\MODBUS\modbus\include -I..\..\User\bsp\BSP -I..\..\PLC -I..\..\Avoid -I..\..\User\parameter -I..\..\User\LaserMotionCtr -I..\..\User\W5100S -I..\..\User\bsp -I..\..\User\CHASSIS -I..\..\User\CONTROLFUNCTION -I..\..\User\DATAUPDATE -I..\..\User\HARAWARE -I..\..\User\MOTORDRIVER -I..\..\User\NAVAGATION -I..\..\User\PLATFORM -I..\..\User\SENSOR -I.\RTE\_Flash -IC:\Users\YDJ\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Users\YDJ\AppData\Local\Arm\Packs\Keil\STM32F4xx_DFP\2.13.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include -D__UVISION_VERSION=527 -D_RTE_ -DSTM32F407xx -DUSE_STDPERIPH_DRIVER -DSTM32F40_41xxx -D__RTX -D__FPU_USED=1 --omf_browse=.\flash\obj\wizchip_conf.crf ..\..\User\W5100S\wizchip_conf.c]
                          THUMB

                          AREA ||i.ctlnetwork||, CODE, READONLY, ALIGN=1

                  ctlnetwork PROC
;;;316    
;;;317    int8_t ctlnetwork(ctlnetwork_type cntype, void* arg)
000000  b510              PUSH     {r4,lr}
;;;318    {
000002  460c              MOV      r4,r1
;;;319       
;;;320       switch(cntype)
000004  2806              CMP      r0,#6
000006  d21e              BCS      |L1.70|
000008  e8dff000          TBB      [pc,r0]
00000c  03070b10          DCB      0x03,0x07,0x0b,0x10
000010  1418              DCB      0x14,0x18
;;;321       {
;;;322          case CN_SET_NETINFO:
;;;323             wizchip_setnetinfo((wiz_NetInfo*)arg);
000012  4620              MOV      r0,r4
000014  f7fffffe          BL       wizchip_setnetinfo
;;;324             break;
000018  e013              B        |L1.66|
;;;325          case CN_GET_NETINFO:
;;;326             wizchip_getnetinfo((wiz_NetInfo*)arg);
00001a  4620              MOV      r0,r4
00001c  f7fffffe          BL       wizchip_getnetinfo
;;;327             break;
000020  e00f              B        |L1.66|
;;;328          case CN_SET_NETMODE:
;;;329             return wizchip_setnetmode(*(netmode_type*)arg);
000022  7820              LDRB     r0,[r4,#0]
000024  e8bd4010          POP      {r4,lr}
000028  f7ffbffe          B.W      wizchip_setnetmode
;;;330          case CN_GET_NETMODE:
;;;331             *(netmode_type*)arg = wizchip_getnetmode();
00002c  f7fffffe          BL       wizchip_getnetmode
000030  7020              STRB     r0,[r4,#0]
;;;332             break;
000032  e006              B        |L1.66|
;;;333          case CN_SET_TIMEOUT:
;;;334             wizchip_settimeout((wiz_NetTimeout*)arg);
000034  4620              MOV      r0,r4
000036  f7fffffe          BL       wizchip_settimeout
;;;335             break;
00003a  e002              B        |L1.66|
;;;336          case CN_GET_TIMEOUT:
;;;337             wizchip_gettimeout((wiz_NetTimeout*)arg);
00003c  4620              MOV      r0,r4
00003e  f7fffffe          BL       wizchip_gettimeout
                  |L1.66|
;;;338             break;
;;;339          default:
;;;340             return -1;
;;;341       }
;;;342       return 0;
000042  2000              MOVS     r0,#0
;;;343    }
000044  bd10              POP      {r4,pc}
                  |L1.70|
000046  f04f30ff          MOV      r0,#0xffffffff        ;340
00004a  bd10              POP      {r4,pc}
;;;344    
                          ENDP


                          AREA ||i.ctlwizchip||, CODE, READONLY, ALIGN=2

                  ctlwizchip PROC
;;;248    
;;;249    int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg)
000000  b57c              PUSH     {r2-r6,lr}
;;;250    {
000002  460c              MOV      r4,r1
;;;251    
;;;252       uint8_t tmp = 0;
;;;253    
;;;254       uint8_t* ptmp[2] = {0,0};
000004  2100              MOVS     r1,#0
000006  9100              STR      r1,[sp,#0]
000008  9101              STR      r1,[sp,#4]
;;;255       switch(cwtype)
;;;256       {
;;;257          case CW_RESET_WIZCHIP:
;;;258             wizchip_sw_reset();
;;;259             break;
;;;260          case CW_INIT_WIZCHIP:
;;;261             if(arg != 0) 
;;;262             {
;;;263                ptmp[0] = (uint8_t*)arg;
;;;264                ptmp[1] = ptmp[0] + _WIZCHIP_SOCK_NUM_;
;;;265             }
;;;266             return wizchip_init(ptmp[0], ptmp[1]);
;;;267          case CW_CLR_INTERRUPT:
;;;268             wizchip_clrinterrupt(*((intr_kind*)arg));
;;;269             break;
;;;270          case CW_GET_INTERRUPT:
;;;271            *((intr_kind*)arg) = wizchip_getinterrupt();
;;;272             break;
;;;273          case CW_SET_INTRMASK:
;;;274             wizchip_setinterruptmask(*((intr_kind*)arg));
;;;275             break;         
;;;276          case CW_GET_INTRMASK:
;;;277             *((intr_kind*)arg) = wizchip_getinterruptmask();
;;;278             break;
;;;279          case CW_GET_ID:
;;;280             ((uint8_t*)arg)[0] = WIZCHIP.id[0];
;;;281             ((uint8_t*)arg)[1] = WIZCHIP.id[1];
;;;282             ((uint8_t*)arg)[2] = WIZCHIP.id[2];
;;;283             ((uint8_t*)arg)[3] = WIZCHIP.id[3];
;;;284             ((uint8_t*)arg)[4] = WIZCHIP.id[4];
;;;285             ((uint8_t*)arg)[5] = 0;
;;;286             break; 
;;;287          case CW_RESET_PHY:
;;;288             wizphy_reset();
;;;289             break;
;;;290          case CW_SET_PHYCONF:
;;;291             wizphy_setphyconf((wiz_PhyConf*)arg);
;;;292             break;
;;;293          case CW_GET_PHYCONF:
;;;294             wizphy_getphyconf((wiz_PhyConf*)arg);
;;;295             break;
;;;296          case CW_GET_PHYSTATUS:
;;;297             break;
;;;298          case CW_SET_PHYPOWMODE:
;;;299             return wizphy_setphypmode(*(uint8_t*)arg);
;;;300          case CW_GET_PHYPOWMODE:
;;;301             tmp = wizphy_getphypmode();
;;;302             if((int8_t)tmp == -1) return -1;
00000a  1e4d              SUBS     r5,r1,#1
00000c  2810              CMP      r0,#0x10              ;255
00000e  d259              BCS      |L2.196|
000010  e8dff000          TBB      [pc,r0]               ;255
000014  080b1a16          DCB      0x08,0x0b,0x1a,0x16
000018  1e225858          DCB      0x1e,0x22,0x58,0x58
00001c  2633363a          DCB      0x26,0x33,0x36,0x3a
000020  543e434d          DCB      0x54,0x3e,0x43,0x4d
000024  f7fffffe          BL       wizchip_sw_reset
000028  e048              B        |L2.188|
00002a  b11c              CBZ      r4,|L2.52|
00002c  9400              STR      r4,[sp,#0]            ;263
00002e  9800              LDR      r0,[sp,#0]            ;264
000030  1d00              ADDS     r0,r0,#4              ;264
000032  9001              STR      r0,[sp,#4]            ;264
                  |L2.52|
000034  e9dd0100          LDRD     r0,r1,[sp,#0]         ;266
000038  e8bd407c          POP      {r2-r6,lr}            ;266
00003c  f7ffbffe          B.W      wizchip_init
000040  8820              LDRH     r0,[r4,#0]            ;268
000042  f7fffffe          BL       wizchip_clrinterrupt
000046  e039              B        |L2.188|
000048  f7fffffe          BL       wizchip_getinterrupt
00004c  8020              STRH     r0,[r4,#0]            ;271
00004e  e035              B        |L2.188|
000050  8820              LDRH     r0,[r4,#0]            ;274
000052  f7fffffe          BL       wizchip_setinterruptmask
000056  e031              B        |L2.188|
000058  f7fffffe          BL       wizchip_getinterruptmask
00005c  8020              STRH     r0,[r4,#0]            ;277
00005e  e02d              B        |L2.188|
000060  4819              LDR      r0,|L2.200|
000062  7882              LDRB     r2,[r0,#2]            ;280  ; WIZCHIP
000064  7022              STRB     r2,[r4,#0]            ;280
000066  78c2              LDRB     r2,[r0,#3]            ;281  ; WIZCHIP
000068  7062              STRB     r2,[r4,#1]            ;281
00006a  7902              LDRB     r2,[r0,#4]            ;282  ; WIZCHIP
00006c  70a2              STRB     r2,[r4,#2]            ;282
00006e  7942              LDRB     r2,[r0,#5]            ;283  ; WIZCHIP
000070  70e2              STRB     r2,[r4,#3]            ;283
000072  7980              LDRB     r0,[r0,#6]            ;284  ; WIZCHIP
000074  7120              STRB     r0,[r4,#4]            ;284
000076  7161              STRB     r1,[r4,#5]            ;285
000078  e020              B        |L2.188|
00007a  f7fffffe          BL       wizphy_reset
00007e  e01d              B        |L2.188|
000080  4620              MOV      r0,r4                 ;291
000082  f7fffffe          BL       wizphy_setphyconf
000086  e019              B        |L2.188|
000088  4620              MOV      r0,r4                 ;294
00008a  f7fffffe          BL       wizphy_getphyconf
00008e  e015              B        |L2.188|
000090  7820              LDRB     r0,[r4,#0]            ;299
000092  e8bd407c          POP      {r2-r6,lr}            ;299
000096  f7ffbffe          B.W      wizphy_setphypmode
00009a  f7fffffe          BL       wizphy_getphypmode
00009e  b2c0              UXTB     r0,r0                 ;301
0000a0  b241              SXTB     r1,r0
0000a2  1c49              ADDS     r1,r1,#1
0000a4  d001              BEQ      |L2.170|
;;;303             *(uint8_t*)arg = tmp;
0000a6  7020              STRB     r0,[r4,#0]
;;;304             break;
0000a8  e008              B        |L2.188|
                  |L2.170|
0000aa  4628              MOV      r0,r5                 ;302
;;;305          case CW_GET_PHYLINK:
;;;306             tmp = wizphy_getphylink();
;;;307             if((int8_t)tmp == -1) return -1;
;;;308             *(uint8_t*)arg = tmp;
;;;309             break;
;;;310          default:
;;;311             return -1;
;;;312       }
;;;313       return 0;
;;;314    }
0000ac  bd7c              POP      {r2-r6,pc}
0000ae  f7fffffe          BL       wizphy_getphylink
0000b2  b2c0              UXTB     r0,r0                 ;306
0000b4  b241              SXTB     r1,r0                 ;307
0000b6  1c49              ADDS     r1,r1,#1              ;307
0000b8  d002              BEQ      |L2.192|
0000ba  7020              STRB     r0,[r4,#0]            ;308
                  |L2.188|
0000bc  2000              MOVS     r0,#0                 ;313
0000be  bd7c              POP      {r2-r6,pc}
                  |L2.192|
0000c0  4628              MOV      r0,r5                 ;307
0000c2  bd7c              POP      {r2-r6,pc}
                  |L2.196|
0000c4  4628              MOV      r0,r5                 ;311
0000c6  bd7c              POP      {r2-r6,pc}
;;;315    
                          ENDP

                  |L2.200|
                          DCD      ||.data||+0x8

                          AREA ||i.reg_wizchip_bus_cbfunc||, CODE, READONLY, ALIGN=2

                  reg_wizchip_bus_cbfunc PROC
;;;199    //void reg_wizchip_bus_cbfunc(uint8_t(*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, uint8_t wb))
;;;200    void reg_wizchip_bus_cbfunc(iodata_t(*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, iodata_t wb))
000000  b510              PUSH     {r4,lr}
;;;201    {
;;;202       while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_BUS_));
000002  4c07              LDR      r4,|L3.32|
000004  8822              LDRH     r2,[r4,#0]
                  |L3.6|
000006  05d3              LSLS     r3,r2,#23
000008  d5fd              BPL      |L3.6|
;;;203       //M20150601 : Rename call back function for integrating with W5300
;;;204       if(!bus_rb || !bus_wb)
00000a  b118              CBZ      r0,|L3.20|
00000c  b111              CBZ      r1,|L3.20|
;;;205       {
;;;206          WIZCHIP.IF.BUS._read_data   = wizchip_bus_readdata;
;;;207          WIZCHIP.IF.BUS._write_data  = wizchip_bus_writedata;
;;;208       }
;;;209       else
;;;210       {
;;;211          WIZCHIP.IF.BUS._read_data   = bus_rb;
00000e  61e0              STR      r0,[r4,#0x1c]  ; WIZCHIP
;;;212          WIZCHIP.IF.BUS._write_data  = bus_wb;
000010  6221              STR      r1,[r4,#0x20]  ; WIZCHIP
;;;213       }
;;;214    }
000012  bd10              POP      {r4,pc}
                  |L3.20|
000014  4803              LDR      r0,|L3.36|
000016  61e0              STR      r0,[r4,#0x1c]         ;206  ; WIZCHIP
000018  4803              LDR      r0,|L3.40|
00001a  6220              STR      r0,[r4,#0x20]         ;207  ; WIZCHIP
00001c  bd10              POP      {r4,pc}
;;;215    
                          ENDP

00001e  0000              DCW      0x0000
                  |L3.32|
                          DCD      ||.data||+0x8
                  |L3.36|
                          DCD      wizchip_bus_readdata
                  |L3.40|
                          DCD      wizchip_bus_writedata

                          AREA ||i.reg_wizchip_cris_cbfunc||, CODE, READONLY, ALIGN=2

                  reg_wizchip_cris_cbfunc PROC
;;;169    
;;;170    void reg_wizchip_cris_cbfunc(void(*cris_en)(void), void(*cris_ex)(void))
000000  4a05              LDR      r2,|L4.24|
;;;171    {
;;;172       if(!cris_en || !cris_ex)
000002  2800              CMP      r0,#0
000004  d003              BEQ      |L4.14|
000006  b111              CBZ      r1,|L4.14|
;;;173       {
;;;174          WIZCHIP.CRIS._enter = wizchip_cris_enter;
;;;175          WIZCHIP.CRIS._exit  = wizchip_cris_exit;
;;;176       }
;;;177       else
;;;178       {
;;;179          WIZCHIP.CRIS._enter = cris_en;
000008  60d0              STR      r0,[r2,#0xc]  ; WIZCHIP
;;;180          WIZCHIP.CRIS._exit  = cris_ex;
00000a  6111              STR      r1,[r2,#0x10]  ; WIZCHIP
;;;181       }
;;;182    }
00000c  4770              BX       lr
                  |L4.14|
00000e  4803              LDR      r0,|L4.28|
000010  60d0              STR      r0,[r2,#0xc]          ;174  ; WIZCHIP
000012  4803              LDR      r0,|L4.32|
000014  6110              STR      r0,[r2,#0x10]         ;175  ; WIZCHIP
000016  4770              BX       lr
;;;183    
                          ENDP

                  |L4.24|
                          DCD      ||.data||+0x8
                  |L4.28|
                          DCD      wizchip_cris_enter
                  |L4.32|
                          DCD      wizchip_cris_exit

                          AREA ||i.reg_wizchip_cs_cbfunc||, CODE, READONLY, ALIGN=2

                  reg_wizchip_cs_cbfunc PROC
;;;183    
;;;184    void reg_wizchip_cs_cbfunc(void(*cs_sel)(void), void(*cs_desel)(void))
000000  4a05              LDR      r2,|L5.24|
;;;185    {
;;;186       if(!cs_sel || !cs_desel)
000002  2800              CMP      r0,#0
000004  d003              BEQ      |L5.14|
000006  b111              CBZ      r1,|L5.14|
;;;187       {
;;;188          WIZCHIP.CS._select   = wizchip_cs_select;
;;;189          WIZCHIP.CS._deselect = wizchip_cs_deselect;
;;;190       }
;;;191       else
;;;192       {
;;;193          WIZCHIP.CS._select   = cs_sel;
000008  6150              STR      r0,[r2,#0x14]  ; WIZCHIP
;;;194          WIZCHIP.CS._deselect = cs_desel;
00000a  6191              STR      r1,[r2,#0x18]  ; WIZCHIP
;;;195       }
;;;196    }
00000c  4770              BX       lr
                  |L5.14|
00000e  4803              LDR      r0,|L5.28|
000010  6150              STR      r0,[r2,#0x14]         ;188  ; WIZCHIP
000012  4803              LDR      r0,|L5.32|
000014  6190              STR      r0,[r2,#0x18]         ;189  ; WIZCHIP
000016  4770              BX       lr
;;;197    
                          ENDP

                  |L5.24|
                          DCD      ||.data||+0x8
                  |L5.28|
                          DCD      wizchip_cs_select
                  |L5.32|
                          DCD      wizchip_cs_deselect

                          AREA ||i.reg_wizchip_spi_cbfunc||, CODE, READONLY, ALIGN=2

                  reg_wizchip_spi_cbfunc PROC
;;;215    
;;;216    void reg_wizchip_spi_cbfunc(uint8_t (*spi_rb)(void), void (*spi_wb)(uint8_t wb))
000000  b510              PUSH     {r4,lr}
;;;217    {
;;;218       while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_SPI_));
000002  4c07              LDR      r4,|L6.32|
000004  8822              LDRH     r2,[r4,#0]
                  |L6.6|
000006  0593              LSLS     r3,r2,#22
000008  d5fd              BPL      |L6.6|
;;;219       
;;;220       if(!spi_rb || !spi_wb)
00000a  b118              CBZ      r0,|L6.20|
00000c  b111              CBZ      r1,|L6.20|
;;;221       {
;;;222          WIZCHIP.IF.SPI._read_byte   = wizchip_spi_readbyte;
;;;223          WIZCHIP.IF.SPI._write_byte  = wizchip_spi_writebyte;
;;;224       }
;;;225       else
;;;226       {
;;;227          WIZCHIP.IF.SPI._read_byte   = spi_rb;
00000e  61e0              STR      r0,[r4,#0x1c]  ; WIZCHIP
;;;228          WIZCHIP.IF.SPI._write_byte  = spi_wb;
000010  6221              STR      r1,[r4,#0x20]  ; WIZCHIP
;;;229       }
;;;230    }
000012  bd10              POP      {r4,pc}
                  |L6.20|
000014  4803              LDR      r0,|L6.36|
000016  61e0              STR      r0,[r4,#0x1c]         ;222  ; WIZCHIP
000018  4803              LDR      r0,|L6.40|
00001a  6220              STR      r0,[r4,#0x20]         ;223  ; WIZCHIP
00001c  bd10              POP      {r4,pc}
;;;231    
                          ENDP

00001e  0000              DCW      0x0000
                  |L6.32|
                          DCD      ||.data||+0x8
                  |L6.36|
                          DCD      wizchip_spi_readbyte
                  |L6.40|
                          DCD      wizchip_spi_writebyte

                          AREA ||i.reg_wizchip_spiburst_cbfunc||, CODE, READONLY, ALIGN=2

                  reg_wizchip_spiburst_cbfunc PROC
;;;232    // 20140626 Eric Added for SPI burst operations
;;;233    void reg_wizchip_spiburst_cbfunc(void (*spi_rb)(uint8_t* pBuf, uint16_t len), void (*spi_wb)(uint8_t* pBuf, uint16_t len))
000000  b510              PUSH     {r4,lr}
;;;234    {
;;;235       while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_SPI_));
000002  4c07              LDR      r4,|L7.32|
000004  8822              LDRH     r2,[r4,#0]
                  |L7.6|
000006  0593              LSLS     r3,r2,#22
000008  d5fd              BPL      |L7.6|
;;;236      
;;;237       if(!spi_rb || !spi_wb)
00000a  b118              CBZ      r0,|L7.20|
00000c  b111              CBZ      r1,|L7.20|
;;;238       {
;;;239          WIZCHIP.IF.SPI._read_burst   = wizchip_spi_readburst;
;;;240          WIZCHIP.IF.SPI._write_burst  = wizchip_spi_writeburst;
;;;241       }
;;;242       else
;;;243       {
;;;244          WIZCHIP.IF.SPI._read_burst   = spi_rb;
00000e  6260              STR      r0,[r4,#0x24]  ; WIZCHIP
;;;245          WIZCHIP.IF.SPI._write_burst  = spi_wb;
000010  62a1              STR      r1,[r4,#0x28]  ; WIZCHIP
;;;246       }
;;;247    }
000012  bd10              POP      {r4,pc}
                  |L7.20|
000014  4803              LDR      r0,|L7.36|
000016  6260              STR      r0,[r4,#0x24]         ;239  ; WIZCHIP
000018  4803              LDR      r0,|L7.40|
00001a  62a0              STR      r0,[r4,#0x28]         ;240  ; WIZCHIP
00001c  bd10              POP      {r4,pc}
;;;248    
                          ENDP

00001e  0000              DCW      0x0000
                  |L7.32|
                          DCD      ||.data||+0x8
                  |L7.36|
                          DCD      wizchip_spi_readburst
                  |L7.40|
                          DCD      wizchip_spi_writeburst

                          AREA ||i.wizchip_bus_readdata||, CODE, READONLY, ALIGN=1

                  wizchip_bus_readdata PROC
;;;93      //M20150601 : Rename the function for integrating with W5300
;;;94     iodata_t wizchip_bus_readdata(uint32_t AddrSel) { return * ((volatile iodata_t *)((ptrdiff_t) AddrSel)); }
000000  7800              LDRB     r0,[r0,#0]
000002  4770              BX       lr
;;;95     
                          ENDP


                          AREA ||i.wizchip_bus_writedata||, CODE, READONLY, ALIGN=1

                  wizchip_bus_writedata PROC
;;;101    //M20150601 : Rename the function for integrating with W5300
;;;102    void   wizchip_bus_writedata(uint32_t AddrSel, iodata_t wb)  { *((volatile iodata_t*)((ptrdiff_t)AddrSel)) = wb; }
000000  7001              STRB     r1,[r0,#0]
000002  4770              BX       lr
;;;103    
                          ENDP


                          AREA ||i.wizchip_clrinterrupt||, CODE, READONLY, ALIGN=1

                  wizchip_clrinterrupt PROC
;;;411    
;;;412    void wizchip_clrinterrupt(intr_kind intr)
000000  0a01              LSRS     r1,r0,#8
;;;413    {
;;;414       uint8_t ir  = (uint8_t)intr;
;;;415       uint8_t sir = (uint8_t)((uint16_t)intr >> 8);
;;;416    
;;;417       ir |= (1<<4); // IK_WOL
000002  f0400010          ORR      r0,r0,#0x10
;;;418       sir &= 0x0F;
000006  f001010f          AND      r1,r1,#0xf
;;;419       ir |= sir;
00000a  4308              ORRS     r0,r0,r1
;;;420       setIR(ir); 
00000c  f00001e0          AND      r1,r0,#0xe0
000010  2015              MOVS     r0,#0x15
000012  f7ffbffe          B.W      WIZCHIP_WRITE
;;;421    }
;;;422    
                          ENDP


                          AREA ||i.wizchip_cris_enter||, CODE, READONLY, ALIGN=1

                  wizchip_cris_enter PROC
;;;64      */
;;;65     void     wizchip_cris_enter(void)           {}
000000  4770              BX       lr
;;;66     
                          ENDP


                          AREA ||i.wizchip_cris_exit||, CODE, READONLY, ALIGN=1

                  wizchip_cris_exit PROC
;;;71      */
;;;72     void     wizchip_cris_exit(void)          {}
000000  4770              BX       lr
;;;73     
                          ENDP


                          AREA ||i.wizchip_cs_deselect||, CODE, READONLY, ALIGN=1

                  wizchip_cs_deselect PROC
;;;85      */
;;;86     void   wizchip_cs_deselect(void)          {}
000000  4770              BX       lr
;;;87     
                          ENDP


                          AREA ||i.wizchip_cs_select||, CODE, READONLY, ALIGN=1

                  wizchip_cs_select PROC
;;;78      */
;;;79     void   wizchip_cs_select(void)            {}
000000  4770              BX       lr
;;;80     
                          ENDP


                          AREA ||i.wizchip_getinterrupt||, CODE, READONLY, ALIGN=1

                  wizchip_getinterrupt PROC
;;;422    
;;;423    intr_kind wizchip_getinterrupt(void)
000000  b510              PUSH     {r4,lr}
;;;424    {
;;;425       uint8_t ir  = 0;
;;;426       uint8_t sir = 0;
;;;427       uint16_t ret = 0;
;;;428    
;;;429       ir = getIR();
000002  2015              MOVS     r0,#0x15
000004  f7fffffe          BL       WIZCHIP_READ
000008  f00000e0          AND      r0,r0,#0xe0
;;;430       sir = ir & 0x0F;
;;;431       ir &= ~(1<<4); // IK_WOL
00000c  f0200010          BIC      r0,r0,#0x10
;;;432       ret = sir;
;;;433       ret = (ret << 8) + ir;
;;;434       return (intr_kind)ret;
;;;435    }
000010  bd10              POP      {r4,pc}
;;;436    
                          ENDP


                          AREA ||i.wizchip_getinterruptmask||, CODE, READONLY, ALIGN=1

                  wizchip_getinterruptmask PROC
;;;448    
;;;449    intr_kind wizchip_getinterruptmask(void)
000000  b510              PUSH     {r4,lr}
;;;450    {
;;;451       uint8_t imr  = 0;
;;;452       uint8_t simr = 0;
;;;453       uint16_t ret = 0;
;;;454    
;;;455       imr  = getIMR();
000002  2016              MOVS     r0,#0x16
000004  f7fffffe          BL       WIZCHIP_READ
;;;456       simr = imr & 0x0F;        
000008  f000010f          AND      r1,r0,#0xf
;;;457       imr &= ~(1<<4); // IK_WOL
00000c  f0200010          BIC      r0,r0,#0x10
;;;458       ret = simr;
;;;459       ret = (ret << 8) + imr;
000010  eb002001          ADD      r0,r0,r1,LSL #8
;;;460       return (intr_kind)ret;
;;;461    }
000014  bd10              POP      {r4,pc}
;;;462    
                          ENDP


                          AREA ||i.wizchip_getnetinfo||, CODE, READONLY, ALIGN=2

                  wizchip_getnetinfo PROC
;;;575    
;;;576    void wizchip_getnetinfo(wiz_NetInfo* pnetinfo)
000000  b510              PUSH     {r4,lr}
;;;577    {
000002  4604              MOV      r4,r0
;;;578       getSHAR(pnetinfo->mac);
000004  2206              MOVS     r2,#6
000006  4621              MOV      r1,r4
000008  2009              MOVS     r0,#9
00000a  f7fffffe          BL       WIZCHIP_READ_BUF
;;;579       getGAR(pnetinfo->gw);
00000e  2204              MOVS     r2,#4
000010  f104010e          ADD      r1,r4,#0xe
000014  2001              MOVS     r0,#1
000016  f7fffffe          BL       WIZCHIP_READ_BUF
;;;580       getSUBR(pnetinfo->sn);
00001a  2204              MOVS     r2,#4
00001c  f104010a          ADD      r1,r4,#0xa
000020  2005              MOVS     r0,#5
000022  f7fffffe          BL       WIZCHIP_READ_BUF
;;;581       getSIPR(pnetinfo->ip);
000026  2204              MOVS     r2,#4
000028  1da1              ADDS     r1,r4,#6
00002a  200f              MOVS     r0,#0xf
00002c  f7fffffe          BL       WIZCHIP_READ_BUF
;;;582       pnetinfo->dns[0]= _DNS_[0];
000030  4806              LDR      r0,|L17.76|
000032  7801              LDRB     r1,[r0,#0]  ; _DNS_
000034  74a1              STRB     r1,[r4,#0x12]
;;;583       pnetinfo->dns[1]= _DNS_[1];
000036  7841              LDRB     r1,[r0,#1]  ; _DNS_
000038  74e1              STRB     r1,[r4,#0x13]
;;;584       pnetinfo->dns[2]= _DNS_[2];
00003a  7881              LDRB     r1,[r0,#2]  ; _DNS_
00003c  7521              STRB     r1,[r4,#0x14]
;;;585       pnetinfo->dns[3]= _DNS_[3];
00003e  78c0              LDRB     r0,[r0,#3]  ; _DNS_
000040  7560              STRB     r0,[r4,#0x15]
;;;586       pnetinfo->dhcp  = _DHCP_;
000042  4802              LDR      r0,|L17.76|
000044  1e40              SUBS     r0,r0,#1
000046  7800              LDRB     r0,[r0,#0]  ; _DHCP_
000048  75a0              STRB     r0,[r4,#0x16]
;;;587    }
00004a  bd10              POP      {r4,pc}
;;;588    
                          ENDP

                  |L17.76|
                          DCD      ||.data||+0x1

                          AREA ||i.wizchip_getnetmode||, CODE, READONLY, ALIGN=1

                  wizchip_getnetmode PROC
;;;598    
;;;599    netmode_type wizchip_getnetmode(void)
000000  2000              MOVS     r0,#0
;;;600    {
;;;601       return (netmode_type) getMR();
000002  f7ffbffe          B.W      WIZCHIP_READ
;;;602    }
;;;603    
                          ENDP


                          AREA ||i.wizchip_gettimeout||, CODE, READONLY, ALIGN=1

                  wizchip_gettimeout PROC
;;;609    
;;;610    void wizchip_gettimeout(wiz_NetTimeout* nettime)
000000  b570              PUSH     {r4-r6,lr}
;;;611    {
000002  4604              MOV      r4,r0
;;;612       nettime->retry_cnt = getRCR();
000004  2019              MOVS     r0,#0x19
000006  f7fffffe          BL       WIZCHIP_READ
00000a  7020              STRB     r0,[r4,#0]
;;;613       nettime->time_100us = getRTR();
00000c  2018              MOVS     r0,#0x18
00000e  f7fffffe          BL       WIZCHIP_READ
000012  4605              MOV      r5,r0
000014  2017              MOVS     r0,#0x17
000016  f7fffffe          BL       WIZCHIP_READ
00001a  eb052000          ADD      r0,r5,r0,LSL #8
00001e  8060              STRH     r0,[r4,#2]
;;;614    }
000020  bd70              POP      {r4-r6,pc}
                          ENDP


                          AREA ||i.wizchip_init||, CODE, READONLY, ALIGN=1

                  wizchip_init PROC
;;;368    
;;;369    int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize)
000000  e92d47f0          PUSH     {r4-r10,lr}
;;;370    {
000004  4681              MOV      r9,r0
000006  460e              MOV      r6,r1
;;;371    	int8_t i,j;
;;;372    	int8_t tmp = 0;
000008  2400              MOVS     r4,#0
;;;373    	wizchip_sw_reset();
00000a  f7fffffe          BL       wizchip_sw_reset
;;;374      
;;;375    	if(txsize)
;;;376    	{
;;;377    		tmp = 0;
;;;378    		//M20150601 : For integrating with W5300
;;;379    
;;;380    		for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
;;;381    		{
;;;382    			tmp += txsize[i];
;;;383    			if(tmp > 8) return -1;  
;;;384    		}    
;;;385    		for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
;;;386    		{
;;;387    			j = 0;
;;;388    			while(txsize[i] >> j != 1){j++;}
;;;389    			setSn_TXBUF_SIZE(i, j);    
00000e  2703              MOVS     r7,#3
000010  f04f38ff          MOV      r8,#0xffffffff        ;383
000014  f1b90f00          CMP      r9,#0                 ;375
000018  d02a              BEQ      |L20.112|
00001a  2200              MOVS     r2,#0                 ;380
                  |L20.28|
00001c  f8190002          LDRB     r0,[r9,r2]            ;382
000020  4420              ADD      r0,r0,r4              ;382
000022  b244              SXTB     r4,r0                 ;382
000024  2c08              CMP      r4,#8                 ;383
000026  dd02              BLE      |L20.46|
000028  4640              MOV      r0,r8                 ;383
                  |L20.42|
;;;390    		}
;;;391    	}
;;;392       
;;;393    	if(rxsize)
;;;394    	{
;;;395    		tmp = 0;
;;;396    
;;;397    		for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
;;;398    		{
;;;399    			tmp += rxsize[i];
;;;400    			if(tmp > 8) return -1;    
;;;401    		}
;;;402    		for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
;;;403    		{
;;;404    			j = 0;
;;;405    			while(rxsize[i] >> j != 1){j++;}
;;;406    			setSn_RXBUF_SIZE(i, j);
;;;407    		}
;;;408    	}
;;;409    	return 0;
;;;410    }
00002a  e8bd87f0          POP      {r4-r10,pc}
                  |L20.46|
00002e  1c52              ADDS     r2,r2,#1              ;380
000030  b252              SXTB     r2,r2                 ;380
000032  2a04              CMP      r2,#4                 ;380
000034  dbf2              BLT      |L20.28|
000036  2500              MOVS     r5,#0                 ;385
                  |L20.56|
000038  2400              MOVS     r4,#0                 ;387
00003a  f8191005          LDRB     r1,[r9,r5]            ;382
00003e  e001              B        |L20.68|
                  |L20.64|
000040  1c64              ADDS     r4,r4,#1              ;388
000042  b264              SXTB     r4,r4                 ;388
                  |L20.68|
000044  fa21f004          LSR      r0,r1,r4              ;388
000048  2801              CMP      r0,#1                 ;388
00004a  d1f9              BNE      |L20.64|
00004c  201b              MOVS     r0,#0x1b              ;389
00004e  f7fffffe          BL       WIZCHIP_READ
000052  4601              MOV      r1,r0                 ;389
000054  0068              LSLS     r0,r5,#1              ;389
000056  fa07f200          LSL      r2,r7,r0              ;389
00005a  4084              LSLS     r4,r4,r0              ;389
00005c  4391              BICS     r1,r1,r2              ;389
00005e  4321              ORRS     r1,r1,r4              ;389
000060  b2c9              UXTB     r1,r1                 ;389
000062  201b              MOVS     r0,#0x1b              ;389
000064  f7fffffe          BL       WIZCHIP_WRITE
000068  1c6d              ADDS     r5,r5,#1              ;385
00006a  b26d              SXTB     r5,r5                 ;385
00006c  2d04              CMP      r5,#4                 ;385
00006e  dbe3              BLT      |L20.56|
                  |L20.112|
000070  b33e              CBZ      r6,|L20.194|
000072  2000              MOVS     r0,#0                 ;395
000074  2200              MOVS     r2,#0                 ;397
                  |L20.118|
000076  5cb1              LDRB     r1,[r6,r2]            ;399
000078  4408              ADD      r0,r0,r1              ;399
00007a  b240              SXTB     r0,r0                 ;399
00007c  2808              CMP      r0,#8                 ;400
00007e  dd01              BLE      |L20.132|
000080  4640              MOV      r0,r8                 ;400
000082  e7d2              B        |L20.42|
                  |L20.132|
000084  1c52              ADDS     r2,r2,#1              ;397
000086  b252              SXTB     r2,r2                 ;397
000088  2a04              CMP      r2,#4                 ;397
00008a  dbf4              BLT      |L20.118|
00008c  2500              MOVS     r5,#0                 ;402
                  |L20.142|
00008e  2400              MOVS     r4,#0                 ;404
000090  5d71              LDRB     r1,[r6,r5]            ;399
000092  e001              B        |L20.152|
                  |L20.148|
000094  1c64              ADDS     r4,r4,#1              ;405
000096  b264              SXTB     r4,r4                 ;405
                  |L20.152|
000098  fa21f004          LSR      r0,r1,r4              ;405
00009c  2801              CMP      r0,#1                 ;405
00009e  d1f9              BNE      |L20.148|
0000a0  201a              MOVS     r0,#0x1a              ;406
0000a2  f7fffffe          BL       WIZCHIP_READ
0000a6  0069              LSLS     r1,r5,#1              ;406
0000a8  fa07f201          LSL      r2,r7,r1              ;406
0000ac  4390              BICS     r0,r0,r2              ;406
0000ae  408c              LSLS     r4,r4,r1              ;406
0000b0  4320              ORRS     r0,r0,r4              ;406
0000b2  b2c1              UXTB     r1,r0                 ;406
0000b4  201a              MOVS     r0,#0x1a              ;406
0000b6  f7fffffe          BL       WIZCHIP_WRITE
0000ba  1c6d              ADDS     r5,r5,#1              ;402
0000bc  b26d              SXTB     r5,r5                 ;402
0000be  2d04              CMP      r5,#4                 ;402
0000c0  dbe5              BLT      |L20.142|
                  |L20.194|
0000c2  2000              MOVS     r0,#0                 ;409
0000c4  e7b1              B        |L20.42|
;;;411    
                          ENDP


                          AREA ||i.wizchip_setinterruptmask||, CODE, READONLY, ALIGN=1

                  wizchip_setinterruptmask PROC
;;;436    
;;;437    void wizchip_setinterruptmask(intr_kind intr)
000000  b2c1              UXTB     r1,r0
;;;438    {
;;;439       uint8_t imr  = (uint8_t)intr;
;;;440       uint8_t simr = (uint8_t)((uint16_t)intr >> 8);
000002  0a00              LSRS     r0,r0,#8
;;;441    
;;;442       imr &= ~(1<<4); // IK_WOL
000004  f0210110          BIC      r1,r1,#0x10
;;;443       simr &= 0x0F;
000008  f000000f          AND      r0,r0,#0xf
;;;444       imr |= simr;
00000c  4301              ORRS     r1,r1,r0
;;;445       setIMR(imr);
00000e  2016              MOVS     r0,#0x16
000010  f7ffbffe          B.W      WIZCHIP_WRITE
;;;446    
;;;447    }
;;;448    
                          ENDP


                          AREA ||i.wizchip_setnetinfo||, CODE, READONLY, ALIGN=2

                  wizchip_setnetinfo PROC
;;;561    
;;;562    void wizchip_setnetinfo(wiz_NetInfo* pnetinfo)
000000  b510              PUSH     {r4,lr}
;;;563    {
000002  4604              MOV      r4,r0
;;;564    
;;;565       setSHAR(pnetinfo->mac);
000004  2206              MOVS     r2,#6
000006  4621              MOV      r1,r4
000008  2009              MOVS     r0,#9
00000a  f7fffffe          BL       WIZCHIP_WRITE_BUF
;;;566       setGAR(pnetinfo->gw);
00000e  2204              MOVS     r2,#4
000010  f104010e          ADD      r1,r4,#0xe
000014  2001              MOVS     r0,#1
000016  f7fffffe          BL       WIZCHIP_WRITE_BUF
;;;567       setSUBR(pnetinfo->sn);
00001a  2204              MOVS     r2,#4
00001c  f104010a          ADD      r1,r4,#0xa
000020  2005              MOVS     r0,#5
000022  f7fffffe          BL       WIZCHIP_WRITE_BUF
;;;568       setSIPR(pnetinfo->ip);
000026  2204              MOVS     r2,#4
000028  1da1              ADDS     r1,r4,#6
00002a  200f              MOVS     r0,#0xf
00002c  f7fffffe          BL       WIZCHIP_WRITE_BUF
;;;569       _DNS_[0] = pnetinfo->dns[0];
000030  4806              LDR      r0,|L22.76|
000032  7ca1              LDRB     r1,[r4,#0x12]
000034  7001              STRB     r1,[r0,#0]
;;;570       _DNS_[1] = pnetinfo->dns[1];
000036  7ce1              LDRB     r1,[r4,#0x13]
000038  7041              STRB     r1,[r0,#1]
;;;571       _DNS_[2] = pnetinfo->dns[2];
00003a  7d21              LDRB     r1,[r4,#0x14]
00003c  7081              STRB     r1,[r0,#2]
;;;572       _DNS_[3] = pnetinfo->dns[3];
00003e  7d61              LDRB     r1,[r4,#0x15]
000040  70c1              STRB     r1,[r0,#3]
;;;573       _DHCP_   = pnetinfo->dhcp;
000042  4902              LDR      r1,|L22.76|
000044  7da0              LDRB     r0,[r4,#0x16]
000046  1e49              SUBS     r1,r1,#1
000048  7008              STRB     r0,[r1,#0]
;;;574    }
00004a  bd10              POP      {r4,pc}
;;;575    
                          ENDP

                  |L22.76|
                          DCD      ||.data||+0x1

                          AREA ||i.wizchip_setnetmode||, CODE, READONLY, ALIGN=1

                  wizchip_setnetmode PROC
;;;588    
;;;589    int8_t wizchip_setnetmode(netmode_type netmode)
000000  b510              PUSH     {r4,lr}
;;;590    {
000002  4604              MOV      r4,r0
;;;591       uint8_t tmp = 0;
;;;592       if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK)) return -1;   
000004  f0340038          BICS     r0,r4,#0x38
000008  d002              BEQ      |L23.16|
00000a  f04f30ff          MOV      r0,#0xffffffff
;;;593       tmp = getMR();
;;;594       tmp |= (uint8_t)netmode;
;;;595       setMR(tmp);
;;;596       return 0;
;;;597    }
00000e  bd10              POP      {r4,pc}
                  |L23.16|
000010  2000              MOVS     r0,#0                 ;593
000012  f7fffffe          BL       WIZCHIP_READ
000016  4320              ORRS     r0,r0,r4              ;594
000018  4601              MOV      r1,r0                 ;595
00001a  2000              MOVS     r0,#0                 ;595
00001c  f7fffffe          BL       WIZCHIP_WRITE
000020  2000              MOVS     r0,#0                 ;596
000022  bd10              POP      {r4,pc}
;;;598    
                          ENDP


                          AREA ||i.wizchip_settimeout||, CODE, READONLY, ALIGN=1

                  wizchip_settimeout PROC
;;;603    
;;;604    void wizchip_settimeout(wiz_NetTimeout* nettime)
000000  b510              PUSH     {r4,lr}
;;;605    {
000002  4604              MOV      r4,r0
;;;606       setRCR(nettime->retry_cnt);
000004  2019              MOVS     r0,#0x19
000006  7821              LDRB     r1,[r4,#0]
000008  f7fffffe          BL       WIZCHIP_WRITE
;;;607       setRTR(nettime->time_100us);
00000c  8860              LDRH     r0,[r4,#2]
00000e  0a01              LSRS     r1,r0,#8
000010  2017              MOVS     r0,#0x17
000012  f7fffffe          BL       WIZCHIP_WRITE
000016  78a1              LDRB     r1,[r4,#2]
000018  e8bd4010          POP      {r4,lr}
00001c  2018              MOVS     r0,#0x18
00001e  f7ffbffe          B.W      WIZCHIP_WRITE
;;;608    }
;;;609    
                          ENDP


                          AREA ||i.wizchip_spi_readburst||, CODE, READONLY, ALIGN=1

                  wizchip_spi_readburst PROC
;;;122     */
;;;123    void   wizchip_spi_readburst(uint8_t* pBuf, uint16_t len)   {}
000000  4770              BX       lr
;;;124    
                          ENDP


                          AREA ||i.wizchip_spi_readbyte||, CODE, READONLY, ALIGN=1

                  wizchip_spi_readbyte PROC
;;;108     */
;;;109    uint8_t wizchip_spi_readbyte(void)        {return 0;}
000000  2000              MOVS     r0,#0
000002  4770              BX       lr
;;;110    
                          ENDP


                          AREA ||i.wizchip_spi_writeburst||, CODE, READONLY, ALIGN=1

                  wizchip_spi_writeburst PROC
;;;129     */
;;;130    void   wizchip_spi_writeburst(uint8_t* pBuf, uint16_t len) {}
000000  4770              BX       lr
;;;131    
                          ENDP


                          AREA ||i.wizchip_spi_writebyte||, CODE, READONLY, ALIGN=1

                  wizchip_spi_writebyte PROC
;;;115     */
;;;116    void   wizchip_spi_writebyte(uint8_t wb) {}
000000  4770              BX       lr
;;;117    
                          ENDP


                          AREA ||i.wizchip_sw_reset||, CODE, READONLY, ALIGN=1

                  wizchip_sw_reset PROC
;;;344    
;;;345    void wizchip_sw_reset(void)
000000  b500              PUSH     {lr}
;;;346    {
000002  b085              SUB      sp,sp,#0x14
;;;347       uint8_t gw[4], sn[4], sip[4];
;;;348       uint8_t mac[6];
;;;349    //A20150601
;;;350    #if _WIZCHIP_IO_MODE_  == _WIZCHIP_IO_MODE_BUS_INDIR_
;;;351       uint16_t mr = (uint16_t)getMR();
;;;352       setMR(mr | MR_IND);
;;;353    #endif
;;;354    
;;;355       getSHAR(mac);
000004  2206              MOVS     r2,#6
000006  4669              MOV      r1,sp
000008  2009              MOVS     r0,#9
00000a  f7fffffe          BL       WIZCHIP_READ_BUF
;;;356       getGAR(gw);  getSUBR(sn);  getSIPR(sip);
00000e  2204              MOVS     r2,#4
000010  a904              ADD      r1,sp,#0x10
000012  2001              MOVS     r0,#1
000014  f7fffffe          BL       WIZCHIP_READ_BUF
000018  2204              MOVS     r2,#4
00001a  a903              ADD      r1,sp,#0xc
00001c  2005              MOVS     r0,#5
00001e  f7fffffe          BL       WIZCHIP_READ_BUF
000022  2204              MOVS     r2,#4
000024  a902              ADD      r1,sp,#8
000026  200f              MOVS     r0,#0xf
000028  f7fffffe          BL       WIZCHIP_READ_BUF
;;;357       setMR(MR_RST);
00002c  2180              MOVS     r1,#0x80
00002e  2000              MOVS     r0,#0
000030  f7fffffe          BL       WIZCHIP_WRITE
;;;358    //A2015051 : For indirect bus mode 
;;;359    #if _WIZCHIP_IO_MODE_  == _WIZCHIP_IO_MODE_BUS_INDIR_
;;;360       setMR(mr | MR_IND);
;;;361    #endif
;;;362    //
;;;363       setSHAR(mac);
000034  2206              MOVS     r2,#6
000036  4669              MOV      r1,sp
000038  2009              MOVS     r0,#9
00003a  f7fffffe          BL       WIZCHIP_WRITE_BUF
;;;364       setGAR(gw);
00003e  2204              MOVS     r2,#4
000040  a904              ADD      r1,sp,#0x10
000042  2001              MOVS     r0,#1
000044  f7fffffe          BL       WIZCHIP_WRITE_BUF
;;;365       setSUBR(sn);
000048  2204              MOVS     r2,#4
00004a  a903              ADD      r1,sp,#0xc
00004c  2005              MOVS     r0,#5
00004e  f7fffffe          BL       WIZCHIP_WRITE_BUF
;;;366       setSIPR(sip);
000052  2204              MOVS     r2,#4
000054  a902              ADD      r1,sp,#8
000056  200f              MOVS     r0,#0xf
000058  f7fffffe          BL       WIZCHIP_WRITE_BUF
;;;367    }
00005c  b005              ADD      sp,sp,#0x14
00005e  bd00              POP      {pc}
;;;368    
                          ENDP


                          AREA ||i.wizphy_getphyconf||, CODE, READONLY, ALIGN=1

                  wizphy_getphyconf PROC
;;;517    
;;;518    void wizphy_getphyconf(wiz_PhyConf* phyconf)
000000  b510              PUSH     {r4,lr}
;;;519    {
000002  4604              MOV      r4,r0
;;;520       uint16_t tmp = 0;
;;;521       tmp = wiz_mdio_read(PHYMDIO_BMCR);
000004  2000              MOVS     r0,#0
000006  f7fffffe          BL       wiz_mdio_read
;;;522       phyconf->by   = PHY_CONFBY_SW;
00000a  2101              MOVS     r1,#1
00000c  7021              STRB     r1,[r4,#0]
;;;523       if(tmp & BMCR_AUTONEGO)
00000e  04c2              LSLS     r2,r0,#19
000010  d501              BPL      |L30.22|
;;;524       {
;;;525         phyconf->mode = PHY_MODE_AUTONEGO;
000012  7061              STRB     r1,[r4,#1]
;;;526       }
;;;527       else
;;;528       {
;;;529         phyconf->mode = PHY_MODE_MANUAL;
;;;530         if(tmp&BMCR_DUP) phyconf->duplex = PHY_DUPLEX_FULL;
;;;531         else phyconf->duplex = PHY_DUPLEX_HALF;
;;;532         if(tmp&BMCR_SPEED) phyconf->speed = PHY_SPEED_100;
;;;533         else phyconf->speed = PHY_SPEED_10;
;;;534       }
;;;535    }
000014  bd10              POP      {r4,pc}
                  |L30.22|
000016  2200              MOVS     r2,#0                 ;529
000018  7062              STRB     r2,[r4,#1]            ;529
00001a  05c3              LSLS     r3,r0,#23             ;530
00001c  d501              BPL      |L30.34|
00001e  70e1              STRB     r1,[r4,#3]            ;530
000020  e000              B        |L30.36|
                  |L30.34|
000022  70e2              STRB     r2,[r4,#3]            ;531
                  |L30.36|
000024  0480              LSLS     r0,r0,#18             ;532
000026  d501              BPL      |L30.44|
000028  70a1              STRB     r1,[r4,#2]            ;532
00002a  bd10              POP      {r4,pc}
                  |L30.44|
00002c  70a2              STRB     r2,[r4,#2]            ;533
00002e  bd10              POP      {r4,pc}
;;;536    
                          ENDP


                          AREA ||i.wizphy_getphylink||, CODE, READONLY, ALIGN=1

                  wizphy_getphylink PROC
;;;462    
;;;463    int8_t wizphy_getphylink(void)
000000  b510              PUSH     {r4,lr}
;;;464    {
;;;465       int8_t tmp;
;;;466       if(getPHYSR() & PHYSR_LNK)
000002  203c              MOVS     r0,#0x3c
000004  f7fffffe          BL       WIZCHIP_READ
000008  07c0              LSLS     r0,r0,#31
00000a  d001              BEQ      |L31.16|
;;;467         tmp = PHY_LINK_ON;
00000c  2001              MOVS     r0,#1
;;;468       else
;;;469         tmp = PHY_LINK_OFF;
;;;470       return tmp;
;;;471    }
00000e  bd10              POP      {r4,pc}
                  |L31.16|
000010  2000              MOVS     r0,#0                 ;469
000012  bd10              POP      {r4,pc}
;;;472    
                          ENDP


                          AREA ||i.wizphy_getphypmode||, CODE, READONLY, ALIGN=1

                  wizphy_getphypmode PROC
;;;474    
;;;475    int8_t wizphy_getphypmode(void)
000000  f04f30ff          MOV      r0,#0xffffffff
;;;476    {
;;;477       return -1;
;;;478    }
000004  4770              BX       lr
;;;479    
                          ENDP


                          AREA ||i.wizphy_reset||, CODE, READONLY, ALIGN=1

                  wizphy_reset PROC
;;;481    
;;;482    void wizphy_reset(void)
000000  b510              PUSH     {r4,lr}
;;;483    {
;;;484      uint16_t tmp = wiz_mdio_read(PHYMDIO_BMCR);
000002  2000              MOVS     r0,#0
000004  f7fffffe          BL       wiz_mdio_read
;;;485      tmp |= BMCR_RESET;
000008  f4404100          ORR      r1,r0,#0x8000
;;;486      wiz_mdio_write(PHYMDIO_BMCR, tmp);
00000c  2000              MOVS     r0,#0
00000e  f7fffffe          BL       wiz_mdio_write
                  |L33.18|
;;;487      while(wiz_mdio_read(PHYMDIO_BMCR)&BMCR_RESET){}
000012  2000              MOVS     r0,#0
000014  f7fffffe          BL       wiz_mdio_read
000018  0400              LSLS     r0,r0,#16
00001a  d4fa              BMI      |L33.18|
;;;488    }
00001c  bd10              POP      {r4,pc}
;;;489    
                          ENDP


                          AREA ||i.wizphy_setphyconf||, CODE, READONLY, ALIGN=1

                  wizphy_setphyconf PROC
;;;489    
;;;490    void wizphy_setphyconf(wiz_PhyConf* phyconf)
000000  b510              PUSH     {r4,lr}
;;;491    {
000002  4604              MOV      r4,r0
;;;492       uint16_t tmp = wiz_mdio_read(PHYMDIO_BMCR);
000004  2000              MOVS     r0,#0
000006  f7fffffe          BL       wiz_mdio_read
;;;493       if(phyconf->mode == PHY_MODE_AUTONEGO)
00000a  7861              LDRB     r1,[r4,#1]
00000c  2901              CMP      r1,#1
00000e  d010              BEQ      |L34.50|
;;;494          tmp |= BMCR_AUTONEGO;
;;;495       else
;;;496       {
;;;497        tmp &= ~BMCR_AUTONEGO;
000010  f4205080          BIC      r0,r0,#0x1000
;;;498          if(phyconf->duplex == PHY_DUPLEX_FULL)
000014  78e1              LDRB     r1,[r4,#3]
000016  2901              CMP      r1,#1
000018  d00e              BEQ      |L34.56|
;;;499          {
;;;500            tmp |= BMCR_DUP;
;;;501          }
;;;502          else
;;;503          {
;;;504            tmp &= ~BMCR_DUP;
00001a  f4207180          BIC      r1,r0,#0x100
                  |L34.30|
;;;505          }
;;;506          if(phyconf->speed == PHY_SPEED_100)
00001e  78a0              LDRB     r0,[r4,#2]
000020  2801              CMP      r0,#1
000022  d00c              BEQ      |L34.62|
;;;507          {
;;;508            tmp |= BMCR_SPEED;
;;;509          }
;;;510          else
;;;511          {
;;;512            tmp &= ~BMCR_SPEED;
000024  f4215100          BIC      r1,r1,#0x2000
                  |L34.40|
;;;513          }
;;;514       }
;;;515       wiz_mdio_write(PHYMDIO_BMCR, tmp);
000028  e8bd4010          POP      {r4,lr}
00002c  2000              MOVS     r0,#0
00002e  f7ffbffe          B.W      wiz_mdio_write
                  |L34.50|
000032  f4405180          ORR      r1,r0,#0x1000         ;494
000036  e7f7              B        |L34.40|
                  |L34.56|
000038  f4407180          ORR      r1,r0,#0x100          ;500
00003c  e7ef              B        |L34.30|
                  |L34.62|
00003e  f4415100          ORR      r1,r1,#0x2000         ;508
000042  e7f1              B        |L34.40|
;;;516    }
;;;517    
                          ENDP


                          AREA ||i.wizphy_setphypmode||, CODE, READONLY, ALIGN=1

                  wizphy_setphypmode PROC
;;;536    
;;;537    int8_t wizphy_setphypmode(uint8_t pmode)
000000  b510              PUSH     {r4,lr}
;;;538    {
000002  4604              MOV      r4,r0
;;;539       uint16_t tmp = 0;
;;;540       tmp = wiz_mdio_read(PHYMDIO_BMCR);
000004  2000              MOVS     r0,#0
000006  f7fffffe          BL       wiz_mdio_read
;;;541       if( pmode == PHY_POWER_DOWN)
00000a  2c01              CMP      r4,#1
00000c  d00d              BEQ      |L35.42|
;;;542       {
;;;543          tmp |= BMCR_PWDN;
;;;544       }
;;;545       else
;;;546       {
;;;547         tmp &= ~BMCR_PWDN;
00000e  f4206100          BIC      r1,r0,#0x800
                  |L35.18|
;;;548       }
;;;549       wiz_mdio_write(PHYMDIO_BMCR, tmp);
000012  2000              MOVS     r0,#0
000014  f7fffffe          BL       wiz_mdio_write
;;;550       tmp = wiz_mdio_read(PHYMDIO_BMCR);
000018  2000              MOVS     r0,#0
00001a  f7fffffe          BL       wiz_mdio_read
;;;551       if( pmode == PHY_POWER_DOWN)
00001e  2c01              CMP      r4,#1
000020  d006              BEQ      |L35.48|
;;;552       {
;;;553          if(tmp & BMCR_PWDN) return 0;
;;;554       }
;;;555       else
;;;556       {
;;;557          if((tmp & BMCR_PWDN) != BMCR_PWDN) return 0;
000022  0500              LSLS     r0,r0,#20
000024  d408              BMI      |L35.56|
000026  2000              MOVS     r0,#0
;;;558       }
;;;559       return -1;
;;;560    }
000028  bd10              POP      {r4,pc}
                  |L35.42|
00002a  f4406100          ORR      r1,r0,#0x800          ;543
00002e  e7f0              B        |L35.18|
                  |L35.48|
000030  0500              LSLS     r0,r0,#20             ;553
000032  d501              BPL      |L35.56|
000034  2000              MOVS     r0,#0                 ;553
000036  bd10              POP      {r4,pc}
                  |L35.56|
000038  f04f30ff          MOV      r0,#0xffffffff        ;559
00003c  bd10              POP      {r4,pc}
;;;561    
                          ENDP


                          AREA ||.data||, DATA, ALIGN=2

                  _DHCP_
000000  00                DCB      0x00
                  _DNS_
000001  000000            DCB      0x00,0x00,0x00
000004  00000000          DCB      0x00,0x00,0x00,0x00
                  WIZCHIP
000008  0200              DCW      0x0200
00000a  5735              DCB      0x57,0x35
00000c  31303053          DCB      0x31,0x30,0x30,0x53
000010  00000000          DCB      0x00,0x00,0x00,0x00
                          DCD      wizchip_cris_enter
                          DCD      wizchip_cris_exit
                          DCD      wizchip_cs_select
                          DCD      wizchip_cs_deselect
                          DCD      wizchip_bus_readdata
                          DCD      wizchip_bus_writedata
                          %        8