AGV / agv_shengyiPPxiaoche · Files

; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637]
; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave -o.\flash\obj\stm32f4xx_sdio.o --asm_dir=.\Flash\List\ --list_dir=.\Flash\List\ --depend=.\flash\obj\stm32f4xx_sdio.d --cpu=Cortex-M4.fp --apcs=interwork -O1 --diag_suppress=9931,870 -I..\..\Libraries\CMSIS\Include -I..\..\Libraries\CMSIS\Device\ST\STM32F4xx\Include -I..\..\Libraries\STM32F4xx_StdPeriph_Driver\inc -I..\..\uCOS-III\uC-CPU -I..\..\uCOS-III\uC-LIB -I..\..\uCOS-III\uCOS-III\Ports -I..\..\uCOS-III\uCOS-III\Source -I..\..\uCOS-III\uC-CPU\ARM-Cortex-M4\RealView -I..\..\uCOS-III\uC-LIB\Ports\ARM-Cortex-M4\RealView -I..\..\uCOS-III\uCOS-III\Ports\ARM-Cortex-M4\Generic\RealView -I..\..\User -I..\..\User\bsp -I..\..\User\bsp\inc -I..\..\User\libapp -I..\..\RL-ARM\Config -I..\..\RL-ARM\Driver -I..\..\RL-ARM\RL-RTX\inc -I..\..\User\bsp\BSP -I..\..\RL-ARM\RL-CAN -I..\..\Libraries\DSP_LIB\Include -I..\..\MODBUS\modbus\rtu -I..\..\MODBUS\BARE\port -I..\..\MODBUS\modbus\include -I..\..\User\bsp\BSP -I..\..\PLC -I..\..\Avoid -I..\..\User\parameter -I..\..\User\LaserMotionCtr -I..\..\User\W5100S -I..\..\User\bsp -I..\..\User\CHASSIS -I..\..\User\CONTROLFUNCTION -I..\..\User\DATAUPDATE -I..\..\User\HARAWARE -I..\..\User\MOTORDRIVER -I..\..\User\NAVAGATION -I..\..\User\PLATFORM -I..\..\User\SENSOR -I.\RTE\_Flash -IC:\Users\YDJ\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Users\YDJ\AppData\Local\Arm\Packs\Keil\STM32F4xx_DFP\2.13.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include -D__UVISION_VERSION=527 -D_RTE_ -DSTM32F407xx -DUSE_STDPERIPH_DRIVER -DSTM32F40_41xxx -D__RTX -D__FPU_USED=1 --omf_browse=.\flash\obj\stm32f4xx_sdio.crf ..\..\Libraries\STM32F4xx_StdPeriph_Driver\src\stm32f4xx_sdio.c]
                          THUMB

                          AREA ||i.SDIO_CEATAITCmd||, CODE, READONLY, ALIGN=2

                  SDIO_CEATAITCmd PROC
;;;722      */
;;;723    void SDIO_CEATAITCmd(FunctionalState NewState)
000000  2101              MOVS     r1,#1
;;;724    { 
;;;725      /* Check the parameters */
;;;726      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;727      
;;;728      *(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)((~((uint32_t)NewState)) & ((uint32_t)0x1));
000002  4381              BICS     r1,r1,r0
000004  4801              LDR      r0,|L1.12|
000006  6001              STR      r1,[r0,#0]
;;;729    }
000008  4770              BX       lr
;;;730    
                          ENDP

00000a  0000              DCW      0x0000
                  |L1.12|
                          DCD      0x422581b4

                          AREA ||i.SDIO_ClearFlag||, CODE, READONLY, ALIGN=2

                  SDIO_ClearFlag PROC
;;;911      */
;;;912    void SDIO_ClearFlag(uint32_t SDIO_FLAG)
000000  4901              LDR      r1,|L2.8|
;;;913    { 
;;;914      /* Check the parameters */
;;;915      assert_param(IS_SDIO_CLEAR_FLAG(SDIO_FLAG));
;;;916       
;;;917      SDIO->ICR = SDIO_FLAG;
000002  6008              STR      r0,[r1,#0]
;;;918    }
000004  4770              BX       lr
;;;919    
                          ENDP

000006  0000              DCW      0x0000
                  |L2.8|
                          DCD      0x40012c38

                          AREA ||i.SDIO_ClearITPendingBit||, CODE, READONLY, ALIGN=2

                  SDIO_ClearITPendingBit PROC
;;;986      */
;;;987    void SDIO_ClearITPendingBit(uint32_t SDIO_IT)
000000  4901              LDR      r1,|L3.8|
;;;988    { 
;;;989      /* Check the parameters */
;;;990      assert_param(IS_SDIO_CLEAR_IT(SDIO_IT));
;;;991       
;;;992      SDIO->ICR = SDIO_IT;
000002  6008              STR      r0,[r1,#0]
;;;993    }
000004  4770              BX       lr
;;;994    
                          ENDP

000006  0000              DCW      0x0000
                  |L3.8|
                          DCD      0x40012c38

                          AREA ||i.SDIO_ClockCmd||, CODE, READONLY, ALIGN=2

                  SDIO_ClockCmd PROC
;;;333      */
;;;334    void SDIO_ClockCmd(FunctionalState NewState)
000000  4901              LDR      r1,|L4.8|
;;;335    {
;;;336      /* Check the parameters */
;;;337      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;338      
;;;339      *(__IO uint32_t *) CLKCR_CLKEN_BB = (uint32_t)NewState;
000002  6008              STR      r0,[r1,#0]
;;;340    }
000004  4770              BX       lr
;;;341    
                          ENDP

000006  0000              DCW      0x0000
                  |L4.8|
                          DCD      0x422580a0

                          AREA ||i.SDIO_CmdStructInit||, CODE, READONLY, ALIGN=1

                  SDIO_CmdStructInit PROC
;;;434      */
;;;435    void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct)
000000  2100              MOVS     r1,#0
;;;436    {
;;;437      /* SDIO_CmdInitStruct members default value */
;;;438      SDIO_CmdInitStruct->SDIO_Argument = 0x00;
000002  6001              STR      r1,[r0,#0]
;;;439      SDIO_CmdInitStruct->SDIO_CmdIndex = 0x00;
000004  6041              STR      r1,[r0,#4]
;;;440      SDIO_CmdInitStruct->SDIO_Response = SDIO_Response_No;
000006  6081              STR      r1,[r0,#8]
;;;441      SDIO_CmdInitStruct->SDIO_Wait = SDIO_Wait_No;
000008  60c1              STR      r1,[r0,#0xc]
;;;442      SDIO_CmdInitStruct->SDIO_CPSM = SDIO_CPSM_Disable;
00000a  6101              STR      r1,[r0,#0x10]
;;;443    }
00000c  4770              BX       lr
;;;444    
                          ENDP


                          AREA ||i.SDIO_CommandCompletionCmd||, CODE, READONLY, ALIGN=2

                  SDIO_CommandCompletionCmd PROC
;;;708      */
;;;709    void SDIO_CommandCompletionCmd(FunctionalState NewState)
000000  4901              LDR      r1,|L6.8|
;;;710    { 
;;;711      /* Check the parameters */
;;;712      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;713      
;;;714      *(__IO uint32_t *) CMD_ENCMDCOMPL_BB = (uint32_t)NewState;
000002  6008              STR      r0,[r1,#0]
;;;715    }
000004  4770              BX       lr
;;;716    
                          ENDP

000006  0000              DCW      0x0000
                  |L6.8|
                          DCD      0x422581b0

                          AREA ||i.SDIO_DMACmd||, CODE, READONLY, ALIGN=2

                  SDIO_DMACmd PROC
;;;768      */
;;;769    void SDIO_DMACmd(FunctionalState NewState)
000000  4901              LDR      r1,|L7.8|
;;;770    {
;;;771      /* Check the parameters */
;;;772      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;773      
;;;774      *(__IO uint32_t *) DCTRL_DMAEN_BB = (uint32_t)NewState;
000002  6008              STR      r0,[r1,#0]
;;;775    }
000004  4770              BX       lr
;;;776    
                          ENDP

000006  0000              DCW      0x0000
                  |L7.8|
                          DCD      0x4225858c

                          AREA ||i.SDIO_DataConfig||, CODE, READONLY, ALIGN=2

                  SDIO_DataConfig PROC
;;;502      */
;;;503    void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct)
000000  b510              PUSH     {r4,lr}
;;;504    {
;;;505      uint32_t tmpreg = 0;
;;;506      
;;;507      /* Check the parameters */
;;;508      assert_param(IS_SDIO_DATA_LENGTH(SDIO_DataInitStruct->SDIO_DataLength));
;;;509      assert_param(IS_SDIO_BLOCK_SIZE(SDIO_DataInitStruct->SDIO_DataBlockSize));
;;;510      assert_param(IS_SDIO_TRANSFER_DIR(SDIO_DataInitStruct->SDIO_TransferDir));
;;;511      assert_param(IS_SDIO_TRANSFER_MODE(SDIO_DataInitStruct->SDIO_TransferMode));
;;;512      assert_param(IS_SDIO_DPSM(SDIO_DataInitStruct->SDIO_DPSM));
;;;513    
;;;514    /*---------------------------- SDIO DTIMER Configuration ---------------------*/
;;;515      /* Set the SDIO Data TimeOut value */
;;;516      SDIO->DTIMER = SDIO_DataInitStruct->SDIO_DataTimeOut;
000002  4a0a              LDR      r2,|L8.44|
000004  6801              LDR      r1,[r0,#0]
000006  6011              STR      r1,[r2,#0]
;;;517    
;;;518    /*---------------------------- SDIO DLEN Configuration -----------------------*/
;;;519      /* Set the SDIO DataLength value */
;;;520      SDIO->DLEN = SDIO_DataInitStruct->SDIO_DataLength;
000008  1d12              ADDS     r2,r2,#4
00000a  6841              LDR      r1,[r0,#4]
00000c  6011              STR      r1,[r2,#0]
;;;521    
;;;522    /*---------------------------- SDIO DCTRL Configuration ----------------------*/  
;;;523      /* Get the SDIO DCTRL value */
;;;524      tmpreg = SDIO->DCTRL;
00000e  1d14              ADDS     r4,r2,#4
000010  6821              LDR      r1,[r4,#0]
;;;525      /* Clear DEN, DTMODE, DTDIR and DBCKSIZE bits */
;;;526      tmpreg &= DCTRL_CLEAR_MASK;
000012  f02101f7          BIC      r1,r1,#0xf7
;;;527      /* Set DEN bit according to SDIO_DPSM value */
;;;528      /* Set DTMODE bit according to SDIO_TransferMode value */
;;;529      /* Set DTDIR bit according to SDIO_TransferDir value */
;;;530      /* Set DBCKSIZE bits according to SDIO_DataBlockSize value */
;;;531      tmpreg |= (uint32_t)SDIO_DataInitStruct->SDIO_DataBlockSize | SDIO_DataInitStruct->SDIO_TransferDir
000016  e9d02302          LDRD     r2,r3,[r0,#8]
00001a  431a              ORRS     r2,r2,r3
00001c  e9d03004          LDRD     r3,r0,[r0,#0x10]
000020  4303              ORRS     r3,r3,r0
000022  431a              ORRS     r2,r2,r3
000024  430a              ORRS     r2,r2,r1
;;;532               | SDIO_DataInitStruct->SDIO_TransferMode | SDIO_DataInitStruct->SDIO_DPSM;
;;;533    
;;;534      /* Write to SDIO DCTRL */
;;;535      SDIO->DCTRL = tmpreg;
000026  6022              STR      r2,[r4,#0]
;;;536    }
000028  bd10              POP      {r4,pc}
;;;537    
                          ENDP

00002a  0000              DCW      0x0000
                  |L8.44|
                          DCD      0x40012c24

                          AREA ||i.SDIO_DataStructInit||, CODE, READONLY, ALIGN=1

                  SDIO_DataStructInit PROC
;;;543      */
;;;544    void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct)
000000  f04f31ff          MOV      r1,#0xffffffff
;;;545    {
;;;546      /* SDIO_DataInitStruct members default value */
;;;547      SDIO_DataInitStruct->SDIO_DataTimeOut = 0xFFFFFFFF;
000004  6001              STR      r1,[r0,#0]
;;;548      SDIO_DataInitStruct->SDIO_DataLength = 0x00;
000006  2100              MOVS     r1,#0
000008  6041              STR      r1,[r0,#4]
;;;549      SDIO_DataInitStruct->SDIO_DataBlockSize = SDIO_DataBlockSize_1b;
00000a  6081              STR      r1,[r0,#8]
;;;550      SDIO_DataInitStruct->SDIO_TransferDir = SDIO_TransferDir_ToCard;
00000c  60c1              STR      r1,[r0,#0xc]
;;;551      SDIO_DataInitStruct->SDIO_TransferMode = SDIO_TransferMode_Block;  
00000e  6101              STR      r1,[r0,#0x10]
;;;552      SDIO_DataInitStruct->SDIO_DPSM = SDIO_DPSM_Disable;
000010  6141              STR      r1,[r0,#0x14]
;;;553    }
000012  4770              BX       lr
;;;554    
                          ENDP


                          AREA ||i.SDIO_DeInit||, CODE, READONLY, ALIGN=1

                  SDIO_DeInit PROC
;;;265      */
;;;266    void SDIO_DeInit(void)
000000  b510              PUSH     {r4,lr}
;;;267    {
;;;268      RCC_APB2PeriphResetCmd(RCC_APB2Periph_SDIO, ENABLE);
000002  2101              MOVS     r1,#1
000004  02cc              LSLS     r4,r1,#11
000006  4620              MOV      r0,r4
000008  f7fffffe          BL       RCC_APB2PeriphResetCmd
;;;269      RCC_APB2PeriphResetCmd(RCC_APB2Periph_SDIO, DISABLE);
00000c  4620              MOV      r0,r4
00000e  e8bd4010          POP      {r4,lr}
000012  2100              MOVS     r1,#0
000014  f7ffbffe          B.W      RCC_APB2PeriphResetCmd
;;;270    }
;;;271    
                          ENDP


                          AREA ||i.SDIO_GetCommandResponse||, CODE, READONLY, ALIGN=2

                  SDIO_GetCommandResponse PROC
;;;449      */
;;;450    uint8_t SDIO_GetCommandResponse(void)
000000  4801              LDR      r0,|L11.8|
;;;451    {
;;;452      return (uint8_t)(SDIO->RESPCMD);
000002  6800              LDR      r0,[r0,#0]
000004  b2c0              UXTB     r0,r0
;;;453    }
000006  4770              BX       lr
;;;454    
                          ENDP

                  |L11.8|
                          DCD      0x40012c10

                          AREA ||i.SDIO_GetDataCounter||, CODE, READONLY, ALIGN=2

                  SDIO_GetDataCounter PROC
;;;559      */
;;;560    uint32_t SDIO_GetDataCounter(void)
000000  4801              LDR      r0,|L12.8|
;;;561    { 
;;;562      return SDIO->DCOUNT;
000002  6800              LDR      r0,[r0,#0]
;;;563    }
000004  4770              BX       lr
;;;564    
                          ENDP

000006  0000              DCW      0x0000
                  |L12.8|
                          DCD      0x40012c30

                          AREA ||i.SDIO_GetFIFOCount||, CODE, READONLY, ALIGN=2

                  SDIO_GetFIFOCount PROC
;;;589      */
;;;590    uint32_t SDIO_GetFIFOCount(void)
000000  4801              LDR      r0,|L13.8|
;;;591    { 
;;;592      return SDIO->FIFOCNT;
000002  6800              LDR      r0,[r0,#0]
;;;593    }
000004  4770              BX       lr
;;;594    
                          ENDP

000006  0000              DCW      0x0000
                  |L13.8|
                          DCD      0x40012c48

                          AREA ||i.SDIO_GetFlagStatus||, CODE, READONLY, ALIGN=2

                  SDIO_GetFlagStatus PROC
;;;874      */
;;;875    FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG)
000000  4601              MOV      r1,r0
;;;876    { 
;;;877      FlagStatus bitstatus = RESET;
000002  2000              MOVS     r0,#0
;;;878      
;;;879      /* Check the parameters */
;;;880      assert_param(IS_SDIO_FLAG(SDIO_FLAG));
;;;881      
;;;882      if ((SDIO->STA & SDIO_FLAG) != (uint32_t)RESET)
000004  4a02              LDR      r2,|L14.16|
000006  6812              LDR      r2,[r2,#0]
000008  420a              TST      r2,r1
00000a  d000              BEQ      |L14.14|
;;;883      {
;;;884        bitstatus = SET;
00000c  2001              MOVS     r0,#1
                  |L14.14|
;;;885      }
;;;886      else
;;;887      {
;;;888        bitstatus = RESET;
;;;889      }
;;;890      return bitstatus;
;;;891    }
00000e  4770              BX       lr
;;;892    
                          ENDP

                  |L14.16|
                          DCD      0x40012c34

                          AREA ||i.SDIO_GetITStatus||, CODE, READONLY, ALIGN=2

                  SDIO_GetITStatus PROC
;;;950      */
;;;951    ITStatus SDIO_GetITStatus(uint32_t SDIO_IT)
000000  4601              MOV      r1,r0
;;;952    { 
;;;953      ITStatus bitstatus = RESET;
000002  2000              MOVS     r0,#0
;;;954      
;;;955      /* Check the parameters */
;;;956      assert_param(IS_SDIO_GET_IT(SDIO_IT));
;;;957      if ((SDIO->STA & SDIO_IT) != (uint32_t)RESET)  
000004  4a02              LDR      r2,|L15.16|
000006  6812              LDR      r2,[r2,#0]
000008  420a              TST      r2,r1
00000a  d000              BEQ      |L15.14|
;;;958      {
;;;959        bitstatus = SET;
00000c  2001              MOVS     r0,#1
                  |L15.14|
;;;960      }
;;;961      else
;;;962      {
;;;963        bitstatus = RESET;
;;;964      }
;;;965      return bitstatus;
;;;966    }
00000e  4770              BX       lr
;;;967    
                          ENDP

                  |L15.16|
                          DCD      0x40012c34

                          AREA ||i.SDIO_GetPowerState||, CODE, READONLY, ALIGN=2

                  SDIO_GetPowerState PROC
;;;366      */
;;;367    uint32_t SDIO_GetPowerState(void)
000000  4802              LDR      r0,|L16.12|
;;;368    {
;;;369      return (SDIO->POWER & (~PWR_PWRCTRL_MASK));
000002  6800              LDR      r0,[r0,#0]
000004  f0000003          AND      r0,r0,#3
;;;370    }
000008  4770              BX       lr
;;;371    
                          ENDP

00000a  0000              DCW      0x0000
                  |L16.12|
                          DCD      0x40012c00

                          AREA ||i.SDIO_GetResponse||, CODE, READONLY, ALIGN=2

                  SDIO_GetResponse PROC
;;;464      */
;;;465    uint32_t SDIO_GetResponse(uint32_t SDIO_RESP)
000000  b508              PUSH     {r3,lr}
;;;466    {
;;;467      __IO uint32_t tmp = 0;
;;;468    
;;;469      /* Check the parameters */
;;;470      assert_param(IS_SDIO_RESP(SDIO_RESP));
;;;471    
;;;472      tmp = SDIO_RESP_ADDR + SDIO_RESP;
000002  4903              LDR      r1,|L17.16|
000004  4408              ADD      r0,r0,r1
000006  9000              STR      r0,[sp,#0]
;;;473      
;;;474      return (*(__IO uint32_t *) tmp); 
000008  9800              LDR      r0,[sp,#0]
00000a  6800              LDR      r0,[r0,#0]
;;;475    }
00000c  bd08              POP      {r3,pc}
;;;476    
                          ENDP

00000e  0000              DCW      0x0000
                  |L17.16|
                          DCD      0x40012c14

                          AREA ||i.SDIO_ITConfig||, CODE, READONLY, ALIGN=2

                  SDIO_ITConfig PROC
;;;826      */
;;;827    void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState)
000000  4a05              LDR      r2,|L18.24|
;;;828    {
;;;829      /* Check the parameters */
;;;830      assert_param(IS_SDIO_IT(SDIO_IT));
;;;831      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;832      
;;;833      if (NewState != DISABLE)
000002  2900              CMP      r1,#0
000004  d003              BEQ      |L18.14|
;;;834      {
;;;835        /* Enable the SDIO interrupts */
;;;836        SDIO->MASK |= SDIO_IT;
000006  6811              LDR      r1,[r2,#0]
000008  4301              ORRS     r1,r1,r0
00000a  6011              STR      r1,[r2,#0]
;;;837      }
;;;838      else
;;;839      {
;;;840        /* Disable the SDIO interrupts */
;;;841        SDIO->MASK &= ~SDIO_IT;
;;;842      } 
;;;843    }
00000c  4770              BX       lr
                  |L18.14|
00000e  6811              LDR      r1,[r2,#0]            ;841
000010  4381              BICS     r1,r1,r0              ;841
000012  6011              STR      r1,[r2,#0]            ;841
000014  4770              BX       lr
;;;844    
                          ENDP

000016  0000              DCW      0x0000
                  |L18.24|
                          DCD      0x40012c3c

                          AREA ||i.SDIO_Init||, CODE, READONLY, ALIGN=2

                  SDIO_Init PROC
;;;278      */
;;;279    void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct)
000000  b530              PUSH     {r4,r5,lr}
;;;280    {
;;;281      uint32_t tmpreg = 0;
;;;282        
;;;283      /* Check the parameters */
;;;284      assert_param(IS_SDIO_CLOCK_EDGE(SDIO_InitStruct->SDIO_ClockEdge));
;;;285      assert_param(IS_SDIO_CLOCK_BYPASS(SDIO_InitStruct->SDIO_ClockBypass));
;;;286      assert_param(IS_SDIO_CLOCK_POWER_SAVE(SDIO_InitStruct->SDIO_ClockPowerSave));
;;;287      assert_param(IS_SDIO_BUS_WIDE(SDIO_InitStruct->SDIO_BusWide));
;;;288      assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(SDIO_InitStruct->SDIO_HardwareFlowControl)); 
;;;289       
;;;290    /*---------------------------- SDIO CLKCR Configuration ------------------------*/  
;;;291      /* Get the SDIO CLKCR value */
;;;292      tmpreg = SDIO->CLKCR;
000002  4b09              LDR      r3,|L19.40|
000004  6819              LDR      r1,[r3,#0]
;;;293      
;;;294      /* Clear CLKDIV, PWRSAV, BYPASS, WIDBUS, NEGEDGE, HWFC_EN bits */
;;;295      tmpreg &= CLKCR_CLEAR_MASK;
000006  f64762ff          MOV      r2,#0x7eff
00000a  4391              BICS     r1,r1,r2
;;;296      
;;;297      /* Set CLKDIV bits according to SDIO_ClockDiv value */
;;;298      /* Set PWRSAV bit according to SDIO_ClockPowerSave value */
;;;299      /* Set BYPASS bit according to SDIO_ClockBypass value */
;;;300      /* Set WIDBUS bits according to SDIO_BusWide value */
;;;301      /* Set NEGEDGE bits according to SDIO_ClockEdge value */
;;;302      /* Set HWFC_EN bits according to SDIO_HardwareFlowControl value */
;;;303      tmpreg |= (SDIO_InitStruct->SDIO_ClockDiv  | SDIO_InitStruct->SDIO_ClockPowerSave |
00000c  7d02              LDRB     r2,[r0,#0x14]
00000e  6884              LDR      r4,[r0,#8]
000010  68c5              LDR      r5,[r0,#0xc]
000012  4322              ORRS     r2,r2,r4
000014  6844              LDR      r4,[r0,#4]
000016  432c              ORRS     r4,r4,r5
000018  4322              ORRS     r2,r2,r4
00001a  6804              LDR      r4,[r0,#0]
00001c  6900              LDR      r0,[r0,#0x10]
00001e  4322              ORRS     r2,r2,r4
000020  4302              ORRS     r2,r2,r0
000022  430a              ORRS     r2,r2,r1
;;;304                 SDIO_InitStruct->SDIO_ClockBypass | SDIO_InitStruct->SDIO_BusWide |
;;;305                 SDIO_InitStruct->SDIO_ClockEdge | SDIO_InitStruct->SDIO_HardwareFlowControl); 
;;;306      
;;;307      /* Write to SDIO CLKCR */
;;;308      SDIO->CLKCR = tmpreg;
000024  601a              STR      r2,[r3,#0]
;;;309    }
000026  bd30              POP      {r4,r5,pc}
;;;310    
                          ENDP

                  |L19.40|
                          DCD      0x40012c04

                          AREA ||i.SDIO_ReadData||, CODE, READONLY, ALIGN=2

                  SDIO_ReadData PROC
;;;569      */
;;;570    uint32_t SDIO_ReadData(void)
000000  4801              LDR      r0,|L20.8|
;;;571    { 
;;;572      return SDIO->FIFO;
000002  6800              LDR      r0,[r0,#0]
;;;573    }
000004  4770              BX       lr
;;;574    
                          ENDP

000006  0000              DCW      0x0000
                  |L20.8|
                          DCD      0x40012c80

                          AREA ||i.SDIO_SendCEATACmd||, CODE, READONLY, ALIGN=2

                  SDIO_SendCEATACmd PROC
;;;736      */
;;;737    void SDIO_SendCEATACmd(FunctionalState NewState)
000000  4901              LDR      r1,|L21.8|
;;;738    { 
;;;739      /* Check the parameters */
;;;740      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;741      
;;;742      *(__IO uint32_t *) CMD_ATACMD_BB = (uint32_t)NewState;
000002  6008              STR      r0,[r1,#0]
;;;743    }
000004  4770              BX       lr
;;;744    
                          ENDP

000006  0000              DCW      0x0000
                  |L21.8|
                          DCD      0x422581b8

                          AREA ||i.SDIO_SendCommand||, CODE, READONLY, ALIGN=2

                  SDIO_SendCommand PROC
;;;398      */
;;;399    void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct)
000000  b510              PUSH     {r4,lr}
;;;400    {
;;;401      uint32_t tmpreg = 0;
;;;402      
;;;403      /* Check the parameters */
;;;404      assert_param(IS_SDIO_CMD_INDEX(SDIO_CmdInitStruct->SDIO_CmdIndex));
;;;405      assert_param(IS_SDIO_RESPONSE(SDIO_CmdInitStruct->SDIO_Response));
;;;406      assert_param(IS_SDIO_WAIT(SDIO_CmdInitStruct->SDIO_Wait));
;;;407      assert_param(IS_SDIO_CPSM(SDIO_CmdInitStruct->SDIO_CPSM));
;;;408      
;;;409    /*---------------------------- SDIO ARG Configuration ------------------------*/
;;;410      /* Set the SDIO Argument value */
;;;411      SDIO->ARG = SDIO_CmdInitStruct->SDIO_Argument;
000002  4a08              LDR      r2,|L22.36|
000004  6801              LDR      r1,[r0,#0]
000006  6011              STR      r1,[r2,#0]
;;;412      
;;;413    /*---------------------------- SDIO CMD Configuration ------------------------*/  
;;;414      /* Get the SDIO CMD value */
;;;415      tmpreg = SDIO->CMD;
000008  1d14              ADDS     r4,r2,#4
00000a  6821              LDR      r1,[r4,#0]
;;;416      /* Clear CMDINDEX, WAITRESP, WAITINT, WAITPEND, CPSMEN bits */
;;;417      tmpreg &= CMD_CLEAR_MASK;
00000c  f36f010a          BFC      r1,#0,#11
;;;418      /* Set CMDINDEX bits according to SDIO_CmdIndex value */
;;;419      /* Set WAITRESP bits according to SDIO_Response value */
;;;420      /* Set WAITINT and WAITPEND bits according to SDIO_Wait value */
;;;421      /* Set CPSMEN bits according to SDIO_CPSM value */
;;;422      tmpreg |= (uint32_t)SDIO_CmdInitStruct->SDIO_CmdIndex | SDIO_CmdInitStruct->SDIO_Response
000010  e9d02301          LDRD     r2,r3,[r0,#4]
000014  431a              ORRS     r2,r2,r3
000016  e9d03003          LDRD     r3,r0,[r0,#0xc]
00001a  4303              ORRS     r3,r3,r0
00001c  431a              ORRS     r2,r2,r3
00001e  430a              ORRS     r2,r2,r1
;;;423               | SDIO_CmdInitStruct->SDIO_Wait | SDIO_CmdInitStruct->SDIO_CPSM;
;;;424      
;;;425      /* Write to SDIO CMD */
;;;426      SDIO->CMD = tmpreg;
000020  6022              STR      r2,[r4,#0]
;;;427    }
000022  bd10              POP      {r4,pc}
;;;428    
                          ENDP

                  |L22.36|
                          DCD      0x40012c08

                          AREA ||i.SDIO_SendSDIOSuspendCmd||, CODE, READONLY, ALIGN=2

                  SDIO_SendSDIOSuspendCmd PROC
;;;676      */
;;;677    void SDIO_SendSDIOSuspendCmd(FunctionalState NewState)
000000  4901              LDR      r1,|L23.8|
;;;678    { 
;;;679      /* Check the parameters */
;;;680      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;681      
;;;682      *(__IO uint32_t *) CMD_SDIOSUSPEND_BB = (uint32_t)NewState;
000002  6008              STR      r0,[r1,#0]
;;;683    }
000004  4770              BX       lr
;;;684    
                          ENDP

000006  0000              DCW      0x0000
                  |L23.8|
                          DCD      0x422581ac

                          AREA ||i.SDIO_SetPowerState||, CODE, READONLY, ALIGN=2

                  SDIO_SetPowerState PROC
;;;349      */
;;;350    void SDIO_SetPowerState(uint32_t SDIO_PowerState)
000000  4901              LDR      r1,|L24.8|
;;;351    {
;;;352      /* Check the parameters */
;;;353      assert_param(IS_SDIO_POWER_STATE(SDIO_PowerState));
;;;354      
;;;355      SDIO->POWER = SDIO_PowerState;
000002  6008              STR      r0,[r1,#0]
;;;356    }
000004  4770              BX       lr
;;;357    
                          ENDP

000006  0000              DCW      0x0000
                  |L24.8|
                          DCD      0x40012c00

                          AREA ||i.SDIO_SetSDIOOperation||, CODE, READONLY, ALIGN=2

                  SDIO_SetSDIOOperation PROC
;;;662      */
;;;663    void SDIO_SetSDIOOperation(FunctionalState NewState)
000000  4901              LDR      r1,|L25.8|
;;;664    { 
;;;665      /* Check the parameters */
;;;666      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;667      
;;;668      *(__IO uint32_t *) DCTRL_SDIOEN_BB = (uint32_t)NewState;
000002  6008              STR      r0,[r1,#0]
;;;669    }
000004  4770              BX       lr
;;;670    
                          ENDP

000006  0000              DCW      0x0000
                  |L25.8|
                          DCD      0x422585ac

                          AREA ||i.SDIO_SetSDIOReadWaitMode||, CODE, READONLY, ALIGN=2

                  SDIO_SetSDIOReadWaitMode PROC
;;;648      */
;;;649    void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode)
000000  4901              LDR      r1,|L26.8|
;;;650    {
;;;651      /* Check the parameters */
;;;652      assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode));
;;;653      
;;;654      *(__IO uint32_t *) DCTRL_RWMOD_BB = SDIO_ReadWaitMode;
000002  6008              STR      r0,[r1,#0]
;;;655    }
000004  4770              BX       lr
;;;656    
                          ENDP

000006  0000              DCW      0x0000
                  |L26.8|
                          DCD      0x422585a8

                          AREA ||i.SDIO_StartSDIOReadWait||, CODE, READONLY, ALIGN=2

                  SDIO_StartSDIOReadWait PROC
;;;618      */
;;;619    void SDIO_StartSDIOReadWait(FunctionalState NewState)
000000  4901              LDR      r1,|L27.8|
;;;620    { 
;;;621      /* Check the parameters */
;;;622      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;623      
;;;624      *(__IO uint32_t *) DCTRL_RWSTART_BB = (uint32_t) NewState;
000002  6008              STR      r0,[r1,#0]
;;;625    }
000004  4770              BX       lr
;;;626    
                          ENDP

000006  0000              DCW      0x0000
                  |L27.8|
                          DCD      0x422585a0

                          AREA ||i.SDIO_StopSDIOReadWait||, CODE, READONLY, ALIGN=2

                  SDIO_StopSDIOReadWait PROC
;;;632      */
;;;633    void SDIO_StopSDIOReadWait(FunctionalState NewState)
000000  4901              LDR      r1,|L28.8|
;;;634    { 
;;;635      /* Check the parameters */
;;;636      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;637      
;;;638      *(__IO uint32_t *) DCTRL_RWSTOP_BB = (uint32_t) NewState;
000002  6008              STR      r0,[r1,#0]
;;;639    }
000004  4770              BX       lr
;;;640    
                          ENDP

000006  0000              DCW      0x0000
                  |L28.8|
                          DCD      0x422585a4

                          AREA ||i.SDIO_StructInit||, CODE, READONLY, ALIGN=1

                  SDIO_StructInit PROC
;;;316      */
;;;317    void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct)
000000  2100              MOVS     r1,#0
;;;318    {
;;;319      /* SDIO_InitStruct members default value */
;;;320      SDIO_InitStruct->SDIO_ClockDiv = 0x00;
000002  7501              STRB     r1,[r0,#0x14]
;;;321      SDIO_InitStruct->SDIO_ClockEdge = SDIO_ClockEdge_Rising;
000004  6001              STR      r1,[r0,#0]
;;;322      SDIO_InitStruct->SDIO_ClockBypass = SDIO_ClockBypass_Disable;
000006  6041              STR      r1,[r0,#4]
;;;323      SDIO_InitStruct->SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable;
000008  6081              STR      r1,[r0,#8]
;;;324      SDIO_InitStruct->SDIO_BusWide = SDIO_BusWide_1b;
00000a  60c1              STR      r1,[r0,#0xc]
;;;325      SDIO_InitStruct->SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable;
00000c  6101              STR      r1,[r0,#0x10]
;;;326    }
00000e  4770              BX       lr
;;;327    
                          ENDP


                          AREA ||i.SDIO_WriteData||, CODE, READONLY, ALIGN=2

                  SDIO_WriteData PROC
;;;579      */
;;;580    void SDIO_WriteData(uint32_t Data)
000000  4901              LDR      r1,|L30.8|
;;;581    { 
;;;582      SDIO->FIFO = Data;
000002  6008              STR      r0,[r1,#0]
;;;583    }
000004  4770              BX       lr
;;;584    
                          ENDP

000006  0000              DCW      0x0000
                  |L30.8|
                          DCD      0x40012c80

;*** Start embedded assembler ***

#line 1 "..\\..\\Libraries\\STM32F4xx_StdPeriph_Driver\\src\\stm32f4xx_sdio.c"
	AREA ||.rev16_text||, CODE
	THUMB
	EXPORT |__asm___16_stm32f4xx_sdio_c_c8827541____REV16|
#line 129 "..\\..\\Libraries\\CMSIS\\Include\\core_cmInstr.h"
|__asm___16_stm32f4xx_sdio_c_c8827541____REV16| PROC
#line 130

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE
	THUMB
	EXPORT |__asm___16_stm32f4xx_sdio_c_c8827541____REVSH|
#line 144
|__asm___16_stm32f4xx_sdio_c_c8827541____REVSH| PROC
#line 145

 revsh r0, r0
 bx lr
	ENDP
	AREA ||.rrx_text||, CODE
	THUMB
	EXPORT |__asm___16_stm32f4xx_sdio_c_c8827541____RRX|
#line 300
|__asm___16_stm32f4xx_sdio_c_c8827541____RRX| PROC
#line 301

 rrx r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***