misc.txt 10.8 KB
; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637]
; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave -o.\flash\obj\misc.o --asm_dir=.\Flash\List\ --list_dir=.\Flash\List\ --depend=.\flash\obj\misc.d --cpu=Cortex-M4.fp --apcs=interwork -O1 --diag_suppress=9931,870 -I..\..\Libraries\CMSIS\Include -I..\..\Libraries\CMSIS\Device\ST\STM32F4xx\Include -I..\..\Libraries\STM32F4xx_StdPeriph_Driver\inc -I..\..\uCOS-III\uC-CPU -I..\..\uCOS-III\uC-LIB -I..\..\uCOS-III\uCOS-III\Ports -I..\..\uCOS-III\uCOS-III\Source -I..\..\uCOS-III\uC-CPU\ARM-Cortex-M4\RealView -I..\..\uCOS-III\uC-LIB\Ports\ARM-Cortex-M4\RealView -I..\..\uCOS-III\uCOS-III\Ports\ARM-Cortex-M4\Generic\RealView -I..\..\User -I..\..\User\bsp -I..\..\User\bsp\inc -I..\..\User\libapp -I..\..\RL-ARM\Config -I..\..\RL-ARM\Driver -I..\..\RL-ARM\RL-RTX\inc -I..\..\User\bsp\BSP -I..\..\RL-ARM\RL-CAN -I..\..\Libraries\DSP_LIB\Include -I..\..\MODBUS\modbus\rtu -I..\..\MODBUS\BARE\port -I..\..\MODBUS\modbus\include -I..\..\User\bsp\BSP -I..\..\PLC -I..\..\Avoid -I..\..\User\parameter -I..\..\User\LaserMotionCtr -I..\..\User\W5100S -I..\..\User\bsp -I..\..\User\CHASSIS -I..\..\User\CONTROLFUNCTION -I..\..\User\DATAUPDATE -I..\..\User\HARAWARE -I..\..\User\MOTORDRIVER -I..\..\User\NAVAGATION -I..\..\User\PLATFORM -I..\..\User\SENSOR -I.\RTE\_Flash -IC:\Users\YDJ\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Users\YDJ\AppData\Local\Arm\Packs\Keil\STM32F4xx_DFP\2.13.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include -D__UVISION_VERSION=527 -D_RTE_ -DSTM32F407xx -DUSE_STDPERIPH_DRIVER -DSTM32F40_41xxx -D__RTX -D__FPU_USED=1 --omf_browse=.\flash\obj\misc.crf ..\..\Libraries\STM32F4xx_StdPeriph_Driver\src\misc.c]
                          THUMB

                          AREA ||i.NVIC_Init||, CODE, READONLY, ALIGN=2

                  NVIC_Init PROC
;;;135      */
;;;136    void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
000000  b530              PUSH     {r4,r5,lr}
;;;137    {
;;;138      uint8_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F;
000002  230f              MOVS     r3,#0xf
;;;139      
;;;140      /* Check the parameters */
;;;141      assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
;;;142      assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));  
;;;143      assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
;;;144        
;;;145      if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
000004  78c2              LDRB     r2,[r0,#3]
;;;146      {
;;;147        /* Compute the Corresponding IRQ Priority --------------------------------*/    
;;;148        tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08;
;;;149        tmppre = (0x4 - tmppriority);
;;;150        tmpsub = tmpsub >> tmppriority;
;;;151    
;;;152        tmppriority = NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
;;;153        tmppriority |=  (uint8_t)(NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub);
;;;154            
;;;155        tmppriority = tmppriority << 0x04;
;;;156            
;;;157        NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;
;;;158        
;;;159        /* Enable the Selected IRQ Channels --------------------------------------*/
;;;160        NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
000006  2501              MOVS     r5,#1
000008  7801              LDRB     r1,[r0,#0]            ;157
00000a  2a00              CMP      r2,#0                 ;145
00000c  d01f              BEQ      |L1.78|
00000e  4a15              LDR      r2,|L1.100|
000010  6812              LDR      r2,[r2,#0]            ;148
000012  f40262e0          AND      r2,r2,#0x700          ;148
000016  f5c262e0          RSB      r2,r2,#0x700          ;148
00001a  f3c22207          UBFX     r2,r2,#8,#8           ;148
00001e  f1c20404          RSB      r4,r2,#4              ;149
000022  40d3              LSRS     r3,r3,r2              ;150
000024  7842              LDRB     r2,[r0,#1]            ;152
000026  40a2              LSLS     r2,r2,r4              ;152
000028  7884              LDRB     r4,[r0,#2]            ;153
00002a  401c              ANDS     r4,r4,r3              ;153
00002c  4314              ORRS     r4,r4,r2              ;153
00002e  0122              LSLS     r2,r4,#4              ;155
000030  f10121e0          ADD      r1,r1,#0xe000e000     ;157
000034  f8812400          STRB     r2,[r1,#0x400]        ;157
000038  7800              LDRB     r0,[r0,#0]
00003a  f000011f          AND      r1,r0,#0x1f
00003e  408d              LSLS     r5,r5,r1
000040  0940              LSRS     r0,r0,#5
000042  0080              LSLS     r0,r0,#2
000044  f10020e0          ADD      r0,r0,#0xe000e000
000048  f8c05100          STR      r5,[r0,#0x100]
;;;161          (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
;;;162      }
;;;163      else
;;;164      {
;;;165        /* Disable the Selected IRQ Channels -------------------------------------*/
;;;166        NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
;;;167          (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
;;;168      }
;;;169    }
00004c  bd30              POP      {r4,r5,pc}
                  |L1.78|
00004e  f001001f          AND      r0,r1,#0x1f           ;166
000052  4085              LSLS     r5,r5,r0              ;166
000054  0948              LSRS     r0,r1,#5              ;166
000056  0080              LSLS     r0,r0,#2              ;166
000058  f10020e0          ADD      r0,r0,#0xe000e000     ;166
00005c  f8c05180          STR      r5,[r0,#0x180]        ;166
000060  bd30              POP      {r4,r5,pc}
;;;170    
                          ENDP

000062  0000              DCW      0x0000
                  |L1.100|
                          DCD      0xe000ed0c

                          AREA ||i.NVIC_PriorityGroupConfig||, CODE, READONLY, ALIGN=2

                  NVIC_PriorityGroupConfig PROC
;;;117      */
;;;118    void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
000000  4902              LDR      r1,|L2.12|
;;;119    {
;;;120      /* Check the parameters */
;;;121      assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
;;;122      
;;;123      /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
;;;124      SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
000002  4308              ORRS     r0,r0,r1
000004  4902              LDR      r1,|L2.16|
000006  6008              STR      r0,[r1,#0]
;;;125    }
000008  4770              BX       lr
;;;126    
                          ENDP

00000a  0000              DCW      0x0000
                  |L2.12|
                          DCD      0x05fa0000
                  |L2.16|
                          DCD      0xe000ed0c

                          AREA ||i.NVIC_SetVectorTable||, CODE, READONLY, ALIGN=2

                  NVIC_SetVectorTable PROC
;;;179      */
;;;180    void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
000000  4a02              LDR      r2,|L3.12|
;;;181    { 
;;;182      /* Check the parameters */
;;;183      assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));
;;;184      assert_param(IS_NVIC_OFFSET(Offset));  
;;;185       
;;;186      SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
000002  4011              ANDS     r1,r1,r2
000004  4301              ORRS     r1,r1,r0
000006  4802              LDR      r0,|L3.16|
000008  6001              STR      r1,[r0,#0]
;;;187    }
00000a  4770              BX       lr
;;;188    
                          ENDP

                  |L3.12|
                          DCD      0x1fffff80
                  |L3.16|
                          DCD      0xe000ed08

                          AREA ||i.NVIC_SystemLPConfig||, CODE, READONLY, ALIGN=2

                  NVIC_SystemLPConfig PROC
;;;198      */
;;;199    void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
000000  4a05              LDR      r2,|L4.24|
;;;200    {
;;;201      /* Check the parameters */
;;;202      assert_param(IS_NVIC_LP(LowPowerMode));
;;;203      assert_param(IS_FUNCTIONAL_STATE(NewState));  
;;;204      
;;;205      if (NewState != DISABLE)
000002  2900              CMP      r1,#0
000004  d003              BEQ      |L4.14|
;;;206      {
;;;207        SCB->SCR |= LowPowerMode;
000006  6811              LDR      r1,[r2,#0]
000008  4301              ORRS     r1,r1,r0
00000a  6011              STR      r1,[r2,#0]
;;;208      }
;;;209      else
;;;210      {
;;;211        SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
;;;212      }
;;;213    }
00000c  4770              BX       lr
                  |L4.14|
00000e  6811              LDR      r1,[r2,#0]            ;211
000010  4381              BICS     r1,r1,r0              ;211
000012  6011              STR      r1,[r2,#0]            ;211
000014  4770              BX       lr
;;;214    
                          ENDP

000016  0000              DCW      0x0000
                  |L4.24|
                          DCD      0xe000ed10

                          AREA ||i.SysTick_CLKSourceConfig||, CODE, READONLY, ALIGN=1

                  SysTick_CLKSourceConfig PROC
;;;222      */
;;;223    void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
000000  f04f21e0          MOV      r1,#0xe000e000
;;;224    {
;;;225      /* Check the parameters */
;;;226      assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
;;;227      if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
000004  2804              CMP      r0,#4
000006  d004              BEQ      |L5.18|
;;;228      {
;;;229        SysTick->CTRL |= SysTick_CLKSource_HCLK;
;;;230      }
;;;231      else
;;;232      {
;;;233        SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
000008  6908              LDR      r0,[r1,#0x10]
00000a  f0200004          BIC      r0,r0,#4
00000e  6108              STR      r0,[r1,#0x10]
;;;234      }
;;;235    }
000010  4770              BX       lr
                  |L5.18|
000012  6908              LDR      r0,[r1,#0x10]         ;229
000014  f0400004          ORR      r0,r0,#4              ;229
000018  6108              STR      r0,[r1,#0x10]         ;229
00001a  4770              BX       lr
;;;236    
                          ENDP


;*** Start embedded assembler ***

#line 1 "..\\..\\Libraries\\STM32F4xx_StdPeriph_Driver\\src\\misc.c"
	AREA ||.rev16_text||, CODE
	THUMB
	EXPORT |__asm___6_misc_c_d0fc1254____REV16|
#line 129 "..\\..\\Libraries\\CMSIS\\Include\\core_cmInstr.h"
|__asm___6_misc_c_d0fc1254____REV16| PROC
#line 130

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE
	THUMB
	EXPORT |__asm___6_misc_c_d0fc1254____REVSH|
#line 144
|__asm___6_misc_c_d0fc1254____REVSH| PROC
#line 145

 revsh r0, r0
 bx lr
	ENDP
	AREA ||.rrx_text||, CODE
	THUMB
	EXPORT |__asm___6_misc_c_d0fc1254____RRX|
#line 300
|__asm___6_misc_c_d0fc1254____RRX| PROC
#line 301

 rrx r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***